pmu_internal.h File Reference

Data Structures
struct	pmu_data_s

Macros
#define	PI_PMU_MAESTRO_EVENT_ICU_OK
#define	PI_PMU_MAESTRO_EVENT_ICU_DELAYED
#define	PI_PMU_MAESTRO_EVENT_MODE_CHANGED
#define	PI_PMU_MAESTRO_EVENT_PICL_OK
#define	PI_PMU_MAESTRO_EVENT_SCU_OK
#define	PI_PMU_DCDC_DEFAULT_NV
#define	PI_PMU_DCDC_DEFAULT_MV
#define	PI_PMU_DCDC_DEFAULT_LV
#define	PI_PMU_DCDC_DEFAULT_RET
#define	PI_PMU_DCDC_RANGE
#define	PI_PMU_DCDC_RANGE_MASK
#define	PI_PMU_DCDC_LOW_DCDC_VALUE
#define	PI_PMU_DCDC_LOW_MV_VALUE
#define	PI_PMU_DCDC_STEP_MV

Enumerations
enum	pi_pmu_state_e

Functions
void	__pi_pmu_init (void)
int	__pi_pmu_voltage_set (pi_pmu_domain_e domain, uint32_t voltage)
int	__pi_pmu_state_get (pi_pmu_domain_e domain)
int	__pi_pmu_boot_state_get (pi_pmu_domain_e domain)
int	__pi_pmu_sleep_mode_set (pi_pmu_domain_e domain, struct pi_pmu_sleep_conf_s *conf)
int	__pi_pmu_sleep_mode_enable (pi_pmu_domain_e domain)

Macro Definition Documentation

#define PI_PMU_DCDC_DEFAULT_LV

#define PI_PMU_DCDC_DEFAULT_MV

#define PI_PMU_DCDC_DEFAULT_NV

Default RAR = 0x0509090d Regulator setting : V[4:0] = 0x05 + ((Vr - 800) / 50) Vr = ((V[4:0] - 0x05) * 50) + 800

#define PI_PMU_DCDC_DEFAULT_RET

#define PI_PMU_DCDC_LOW_DCDC_VALUE

#define PI_PMU_DCDC_LOW_MV_VALUE

#define PI_PMU_DCDC_RANGE

#define PI_PMU_DCDC_RANGE_MASK

#define PI_PMU_DCDC_STEP_MV

#define PI_PMU_MAESTRO_EVENT_ICU_DELAYED

Referenced by __pi_pmu_regulator_state_change().

#define PI_PMU_MAESTRO_EVENT_ICU_OK

Referenced by __pi_pmu_regulator_state_change().

#define PI_PMU_MAESTRO_EVENT_MODE_CHANGED

Referenced by __pi_pmu_regulator_state_change().

#define PI_PMU_MAESTRO_EVENT_PICL_OK

Referenced by __pi_pmu_regulator_state_change().

#define PI_PMU_MAESTRO_EVENT_SCU_OK

Referenced by __pi_pmu_regulator_state_change().

Enumeration Type Documentation

enum pi_pmu_state_e

Enumerator
PI_PMU_STATE_HV	High voltage : 1.1V - 1.3V.
PI_PMU_STATE_LV	Low voltage : 0.9V - 1.1V.
PI_PMU_STATE_RET	Sleep mode 0.8V.

Function Documentation

int __pi_pmu_boot_state_get

(

pi_pmu_domain_e

domain

)

References soc_ctrl_safe_pmu_sleepctrl_t::bttype, soc_ctrl_safe_pmu_sleepctrl_t::field, and pmu_data_s::sleepctrl.

Referenced by pi_pmu_boot_state_get().

void __pi_pmu_init

(

void

)

References __pi_pmu_handler(), ARCHI_FREQ_INIT, soc_ctrl_cl_bypass_t::byp_clk, soc_ctrl_cl_bypass_t::byp_pow, soc_ctrl_safe_pmu_sleepctrl_t::cl_wake, pmu_data_s::cluster_state, pmu_data_s::cur_voltage, pmu_data_s::dcdc_regulator, soc_ctrl_cl_bypass_t::field, soc_ctrl_safe_pmu_rar_t::field, soc_ctrl_safe_pmu_sleepctrl_t::field, pmu_data_s::fifo_head, pmu_data_s::fifo_tail, FLL_ID_FC, hal_pmu_dlc_ifr_mask_clear(), hal_pmu_dlc_imr_mask_set(), hal_soc_ctrl_cl_bypass_get(), hal_soc_ctrl_cl_bypass_mask_set(), hal_soc_ctrl_pmu_rar_get(), hal_soc_ctrl_pmu_sleepctrl_get(), hal_soc_eu_set_fc_mask(), soc_ctrl_safe_pmu_rar_t::nv_volt, pi_fc_event_handler_set(), pi_fll_init(), PI_PMU_DCDC_TO_MV, PMU_DLC_DLC_IFR_PICL_OK_MASK, PMU_DLC_DLC_IFR_SCU_OK_MASK, PMU_DLC_DLC_IMR_ICU_DLYD_MASK, PMU_DLC_DLC_IMR_ICU_MD_CHG_MASK, PMU_DLC_DLC_IMR_ICU_OK_MASK, pmu_data_s::pmu_state, PMU_TRACE, pmu_data_s::sleep_state, pmu_data_s::sleepcfg, pmu_data_s::sleepctrl, SOC_EVENT_PMU_CLUSTER_CG, SOC_EVENT_PMU_CLUSTER_POWER, SOC_EVENT_PMU_DLC_BRIDGE_PICL, SOC_EVENT_PMU_DLC_BRIDGE_SCU, soc_ctrl_safe_pmu_sleepctrl_t::wakestate, soc_ctrl_cl_bypass_t::word, soc_ctrl_safe_pmu_rar_t::word, and soc_ctrl_safe_pmu_sleepctrl_t::word.

Referenced by system_init().

int __pi_pmu_sleep_mode_enable

(

pi_pmu_domain_e

domain

)

References __pi_pmu_regulator_state_change(), hal_soc_ctrl_pmu_sleepctrl_get(), hal_soc_ctrl_pmu_sleepctrl_mask_set(), PI_PMU_SCU_SEQ_DEEP_SLEEP, PI_PMU_SCU_SEQ_RET_DEEP_SLEEP, PMU_TRACE, pmu_data_s::sleep_state, pmu_data_s::sleepcfg, and soc_ctrl_safe_pmu_sleepctrl_t::word.

Referenced by pi_pmu_sleep_mode_enable().

int __pi_pmu_sleep_mode_set	(	pi_pmu_domain_e	domain,
		struct pi_pmu_sleep_conf_s *	conf
	)

References soc_ctrl_safe_pmu_sleepctrl_t::btdev, soc_ctrl_safe_pmu_sleepctrl_t::bttype, soc_ctrl_safe_pmu_sleepctrl_t::cl_fll, soc_ctrl_safe_pmu_sleepctrl_t::cl_wake, disable_irq(), soc_ctrl_safe_pmu_sleepctrl_t::extint, soc_ctrl_safe_pmu_sleepctrl_t::extwake_en, soc_ctrl_safe_pmu_sleepctrl_t::extwake_src, soc_ctrl_safe_pmu_sleepctrl_t::extwake_type, soc_ctrl_safe_pmu_sleepctrl_t::field, soc_ctrl_safe_pmu_sleepctrl_t::l2_r0, soc_ctrl_safe_pmu_sleepctrl_t::l2_r1, soc_ctrl_safe_pmu_sleepctrl_t::l2_r2, soc_ctrl_safe_pmu_sleepctrl_t::l2_r3, PI_PMU_BOOT_DEV_L2, PI_PMU_BOOT_DEV_ROM, PI_PMU_FLL_RET_OFF, PI_PMU_FLL_RET_ON, PI_PMU_L2_MEM_RET_OFF, PI_PMU_L2_MEM_RET_ON, PMU_TRACE, PMU_TRACE_ERR, restore_irq(), pmu_data_s::sleep_state, pmu_data_s::sleepcfg, pmu_data_s::sleepctrl, soc_ctrl_safe_pmu_sleepctrl_t::soc_fll, and soc_ctrl_safe_pmu_sleepctrl_t::wakestate.

Referenced by pi_pmu_sleep_mode_set().

int __pi_pmu_state_get

(

pi_pmu_domain_e

domain

)

References pmu_data_s::cluster_state, and PMU_TRACE_ERR.

Referenced by pi_pmu_state_get().

int __pi_pmu_voltage_set	(	pi_pmu_domain_e	domain,
		uint32_t	voltage
	)

References __pi_pmu_regulator_state_change(), pmu_data_s::cluster_state, pmu_data_s::cur_voltage, pmu_data_s::dcdc_regulator, hal_soc_ctrl_pmu_rar_get(), hal_soc_ctrl_pmu_regulator_set(), PI_PMU_MV_TO_DCDC, PI_PMU_SCU_SEQ_HP_CLUSTER_OFF, PI_PMU_SCU_SEQ_LP_CLUSTER_OFF, PI_PMU_STATE_HV, PI_PMU_STATE_LV, pmu_data_s::pmu_state, PMU_TRACE, PMU_TRACE_ERR, SOC_CTRL_SAFE_PMU_RAR_LV_VOLT, SOC_CTRL_SAFE_PMU_RAR_LV_VOLT_MASK, SOC_CTRL_SAFE_PMU_RAR_LV_VOLT_SHIFT, SOC_CTRL_SAFE_PMU_RAR_NV_VOLT, SOC_CTRL_SAFE_PMU_RAR_NV_VOLT_MASK, SOC_CTRL_SAFE_PMU_RAR_NV_VOLT_SHIFT, and soc_ctrl_safe_pmu_rar_t::word.

Referenced by pi_pmu_voltage_set().