gap8/pmsis/include/pmsis/targets/periph/soc_ctrl_periph.h File Reference

Data Structures
struct	soc_ctrl_t
union	soc_ctrl_info_t
union	soc_ctrl_notused0_t
union	soc_ctrl_notused1_t
union	soc_ctrl_cl_isolate_t
union	soc_ctrl_cl_busy_t
union	soc_ctrl_cl_bypass_t
union	soc_ctrl_jtagreg_t
union	soc_ctrl_l2_sleep_t
union	soc_ctrl_sleep_ctrl_t
union	soc_ctrl_corestatus_t
union	soc_ctrl_corestatus_ro_t
union	soc_ctrl_safe_pmu_rar_t
union	soc_ctrl_safe_pmu_sleepctrl_t
union	soc_ctrl_safe_pmu_force_t
union	soc_ctrl_safe_padfun0_t
union	soc_ctrl_safe_padfun1_t
union	soc_ctrl_safe_padfun2_t
union	soc_ctrl_safe_padfun3_t
union	soc_ctrl_safe_sleeppadcfg0_t
union	soc_ctrl_safe_sleeppadcfg1_t
union	soc_ctrl_safe_sleeppadcfg2_t
union	soc_ctrl_safe_sleeppadcfg3_t
union	soc_ctrl_safe_padsleep_t
union	soc_ctrl_safe_padcfg0_t
union	soc_ctrl_safe_padcfg1_t
union	soc_ctrl_safe_padcfg2_t
union	soc_ctrl_safe_padcfg3_t
union	soc_ctrl_safe_padcfg4_t
union	soc_ctrl_safe_padcfg5_t
union	soc_ctrl_safe_padcfg6_t
union	soc_ctrl_safe_padcfg7_t
union	soc_ctrl_safe_padcfg8_t
union	soc_ctrl_safe_padcfg9_t
union	soc_ctrl_safe_padcfg10_t
union	soc_ctrl_safe_padcfg11_t
union	soc_ctrl_safe_padcfg12_t
union	soc_ctrl_safe_padcfg13_t
union	soc_ctrl_safe_padcfg14_t
union	soc_ctrl_safe_padcfg15_t
union	soc_ctrl_reg_gpio_iso_t
union	soc_ctrl_reg_cam_iso_t
union	soc_ctrl_reg_lvds_iso_t

Macros
INFO
#define	SOC_CTRL_INFO_NB_CL_MASK
#define	SOC_CTRL_INFO_NB_CL_SHIFT
#define	SOC_CTRL_INFO_NB_CL(val)
#define	SOC_CTRL_INFO_NB_CORES_MASK
#define	SOC_CTRL_INFO_NB_CORES_SHIFT
#define	SOC_CTRL_INFO_NB_CORES(val)
CL_ISOLATE
#define	SOC_CTRL_CL_ISOLATE_EN_MASK
#define	SOC_CTRL_CL_ISOLATE_EN_SHIFT
#define	SOC_CTRL_CL_ISOLATE_EN(val)
CL_BUSY
#define	SOC_CTRL_CL_BUSY_BUSY_MASK
#define	SOC_CTRL_CL_BUSY_BUSY_SHIFT
#define	SOC_CTRL_CL_BUSY_BUSY(val)
CL_BYPASS
#define	SOC_CTRL_CL_BYPASS_BYP_POW_MASK
#define	SOC_CTRL_CL_BYPASS_BYP_POW_SHIFT
#define	SOC_CTRL_CL_BYPASS_BYP_POW(val)
#define	SOC_CTRL_CL_BYPASS_BYP_CFG_MASK
#define	SOC_CTRL_CL_BYPASS_BYP_CFG_SHIFT
#define	SOC_CTRL_CL_BYPASS_BYP_CFG(val)
#define	SOC_CTRL_CL_BYPASS_CL_STATE_MASK
#define	SOC_CTRL_CL_BYPASS_CL_STATE_SHIFT
#define	SOC_CTRL_CL_BYPASS_CL_STATE(val)
#define	SOC_CTRL_CL_BYPASS_CURRSET_MASK
#define	SOC_CTRL_CL_BYPASS_CURRSET_SHIFT
#define	SOC_CTRL_CL_BYPASS_CURRSET(val)
#define	SOC_CTRL_CL_BYPASS_PROG_DEL_MASK
#define	SOC_CTRL_CL_BYPASS_PROG_DEL_SHIFT
#define	SOC_CTRL_CL_BYPASS_PROG_DEL(val)
#define	SOC_CTRL_CL_BYPASS_BYP_CLK_MASK
#define	SOC_CTRL_CL_BYPASS_BYP_CLK_SHIFT
#define	SOC_CTRL_CL_BYPASS_BYP_CLK(val)
#define	SOC_CTRL_CL_BYPASS_CG_MASK
#define	SOC_CTRL_CL_BYPASS_CG_SHIFT
#define	SOC_CTRL_CL_BYPASS_CG(val)
#define	READ_SOC_CTRL_CL_BYPASS_CG(val)
#define	SOC_CTRL_CL_BYPASS_FLL_PWD_MASK
#define	SOC_CTRL_CL_BYPASS_FLL_PWD_SHIFT
#define	SOC_CTRL_CL_BYPASS_FLL_PWD(val)
#define	SOC_CTRL_CL_BYPASS_FLL_RET_MASK
#define	SOC_CTRL_CL_BYPASS_FLL_RET_SHIFT
#define	SOC_CTRL_CL_BYPASS_FLL_RET(val)
#define	SOC_CTRL_CL_BYPASS_RST_MASK
#define	SOC_CTRL_CL_BYPASS_RST_SHIFT
#define	SOC_CTRL_CL_BYPASS_RST(val)
#define	SOC_CTRL_CL_BYPASS_BYP_ISO_MASK
#define	SOC_CTRL_CL_BYPASS_BYP_ISO_SHIFT
#define	SOC_CTRL_CL_BYPASS_BYP_ISO(val)
#define	SOC_CTRL_CL_BYPASS_PWISO_MASK
#define	SOC_CTRL_CL_BYPASS_PWISO_SHIFT
#define	SOC_CTRL_CL_BYPASS_PWISO(val)
#define	READ_SOC_CTRL_CL_BYPASS_PWISO(val)
#define	SOC_CTRL_CL_BYPASS_TRCPOWOK_MASK
#define	SOC_CTRL_CL_BYPASS_TRCPOWOK_SHIFT
#define	SOC_CTRL_CL_BYPASS_TRCPOWOK(val)
#define	SOC_CTRL_CL_BYPASS_PMUPOWDOWN_MASK
#define	SOC_CTRL_CL_BYPASS_PMUPOWDOWN_SHIFT
#define	SOC_CTRL_CL_BYPASS_PMUPOWDOWN(val)
JTAGREG
#define	SOC_CTRL_JTAGREG_INT_SYNC_MASK
#define	SOC_CTRL_JTAGREG_INT_SYNC_SHIFT
#define	SOC_CTRL_JTAGREG_INT_SYNC(val)
#define	READ_SOC_CTRL_JTAGREG_INT_SYNC(val)
#define	SOC_CTRL_JTAGREG_INT_BT_MD_MASK
#define	SOC_CTRL_JTAGREG_INT_BT_MD_SHIFT
#define	SOC_CTRL_JTAGREG_INT_BT_MD(val)
#define	READ_SOC_CTRL_JTAGREG_INT_BT_MD(val)
#define	SOC_CTRL_JTAGREG_EXT_SYNC_MASK
#define	SOC_CTRL_JTAGREG_EXT_SYNC_SHIFT
#define	SOC_CTRL_JTAGREG_EXT_SYNC(val)
#define	READ_SOC_CTRL_JTAGREG_EXT_SYNC(val)
#define	SOC_CTRL_JTAGREG_EXT_BT_MD_MASK
#define	SOC_CTRL_JTAGREG_EXT_BT_MD_SHIFT
#define	SOC_CTRL_JTAGREG_EXT_BT_MD(val)
#define	READ_SOC_CTRL_JTAGREG_EXT_BT_MD(val)
L2_SLEEP
#define	SOC_CTRL_L2_SLEEP_L2_SLEEP_MASK
#define	SOC_CTRL_L2_SLEEP_L2_SLEEP_SHIFT
#define	SOC_CTRL_L2_SLEEP_L2_SLEEP(val)
SLEEP_CTRL
#define	SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_MASK
#define	SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_SHIFT
#define	SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL(val)
CORESTATUS
#define	SOC_CTRL_CORESTATUS_STATUS_MASK
#define	SOC_CTRL_CORESTATUS_STATUS_SHIFT
#define	SOC_CTRL_CORESTATUS_STATUS(val)
CORESTATUS_RO
#define	SOC_CTRL_CORESTATUS_RO_STATUS_MASK
#define	SOC_CTRL_CORESTATUS_RO_STATUS_SHIFT
#define	SOC_CTRL_CORESTATUS_RO_STATUS(val)
SAFE_PMU_RAR
#define	SOC_CTRL_SAFE_PMU_RAR_NV_VOLT_MASK
#define	SOC_CTRL_SAFE_PMU_RAR_NV_VOLT_SHIFT
#define	SOC_CTRL_SAFE_PMU_RAR_NV_VOLT(val)
#define	SOC_CTRL_SAFE_PMU_RAR_MV_VOLT_MASK
#define	SOC_CTRL_SAFE_PMU_RAR_MV_VOLT_SHIFT
#define	SOC_CTRL_SAFE_PMU_RAR_MV_VOLT(val)
#define	SOC_CTRL_SAFE_PMU_RAR_LV_VOLT_MASK
#define	SOC_CTRL_SAFE_PMU_RAR_LV_VOLT_SHIFT
#define	SOC_CTRL_SAFE_PMU_RAR_LV_VOLT(val)
#define	SOC_CTRL_SAFE_PMU_RAR_RV_VOLT_MASK
#define	SOC_CTRL_SAFE_PMU_RAR_RV_VOLT_SHIFT
#define	SOC_CTRL_SAFE_PMU_RAR_RV_VOLT(val)
SAFE_PMU_SLEEPCTRL
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R0_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R0_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R0(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R1_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R1_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R1(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R2_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R2_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R2(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R3_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R3_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R3(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_SOC_FLL_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_SOC_FLL_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_SOC_FLL(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_FLL_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_FLL_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_FLL(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_SRC_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_SRC_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_SRC(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_WAKESTATE_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_WAKESTATE_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_WAKESTATE(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTDEV_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTDEV_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTDEV(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTINT_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTINT_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTINT(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTTYPE_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTTYPE_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTTYPE(val)
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_WAKE_MASK
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_WAKE_SHIFT
#define	SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_WAKE(val)
SAFE_PMU_FORCE
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R0_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R0_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R0(val)
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R1_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R1_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R1(val)
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R2_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R2_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R2(val)
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R3_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R3_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R3(val)
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R0_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R0_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R0(val)
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R1_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R1_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R1(val)
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R2_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R2_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R2(val)
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R3_MASK
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R3_SHIFT
#define	SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R3(val)
SAFE_PADFUN
#define	SOC_CTRL_SAFE_PADFUN_FUNC_MASK
#define	SOC_CTRL_SAFE_PADFUN_FUNC_SHIFT
#define	SOC_CTRL_SAFE_PADFUN_FUNC(val)
SAFE_SLEEPPADCFG
#define	SOC_CTRL_SAFE_SLEEPPADCFG_DIR_MASK
#define	SOC_CTRL_SAFE_SLEEPPADCFG_DIR_SHIFT
#define	SOC_CTRL_SAFE_SLEEPPADCFG_DIR(val)
#define	SOC_CTRL_SAFE_SLEEPPADCFG_STATE_MASK
#define	SOC_CTRL_SAFE_SLEEPPADCFG_STATE_SHIFT
#define	SOC_CTRL_SAFE_SLEEPPADCFG_STATE(val)
SAFE_PADSLEEP
#define	SOC_CTRL_SAFE_PADSLEEP_EN_MASK
#define	SOC_CTRL_SAFE_PADSLEEP_EN_SHIFT
#define	SOC_CTRL_SAFE_PADSLEEP_EN(val)
SAFE_PADCFG
#define	SOC_CTRL_SAFE_PADCFG_PULL_EN_MASK
#define	SOC_CTRL_SAFE_PADCFG_PULL_EN_SHIFT
#define	SOC_CTRL_SAFE_PADCFG_PULL_EN(val)
#define	SOC_CTRL_SAFE_PADCFG_DRIVE_STRENGTH_MASK
#define	SOC_CTRL_SAFE_PADCFG_DRIVE_STRENGTH_SHIFT
#define	SOC_CTRL_SAFE_PADCFG_DRIVE_STRENGTH(val)
REG_GPIO_ISO
#define	SOC_CTRL_REG_GPIO_ISO_ISO_MASK
#define	SOC_CTRL_REG_GPIO_ISO_ISO_SHIFT
#define	SOC_CTRL_REG_GPIO_ISO_ISO(val)
REG_CAM_ISO
#define	SOC_CTRL_REG_CAM_ISO_ISO_MASK
#define	SOC_CTRL_REG_CAM_ISO_ISO_SHIFT
#define	SOC_CTRL_REG_CAM_ISO_ISO(val)
REG_LVDS_ISO
#define	SOC_CTRL_REG_LVDS_ISO_ISO_MASK
#define	SOC_CTRL_REG_LVDS_ISO_ISO_SHIFT
#define	SOC_CTRL_REG_LVDS_ISO_ISO(val)

Macro Definition Documentation

#define READ_SOC_CTRL_CL_BYPASS_CG

(

val

)

#define READ_SOC_CTRL_CL_BYPASS_PWISO

(

val

)

#define READ_SOC_CTRL_JTAGREG_EXT_BT_MD

(

val

)

#define READ_SOC_CTRL_JTAGREG_EXT_SYNC

(

val

)

#define READ_SOC_CTRL_JTAGREG_INT_BT_MD

(

val

)

#define READ_SOC_CTRL_JTAGREG_INT_SYNC

(

val

)

#define SOC_CTRL_CL_BUSY_BUSY

(

val

)

#define SOC_CTRL_CL_BUSY_BUSY_MASK

Referenced by hal_soc_ctrl_cl_busy_get().

#define SOC_CTRL_CL_BUSY_BUSY_SHIFT

#define SOC_CTRL_CL_BYPASS_BYP_CFG

(

val

)

#define SOC_CTRL_CL_BYPASS_BYP_CFG_MASK

#define SOC_CTRL_CL_BYPASS_BYP_CFG_SHIFT

#define SOC_CTRL_CL_BYPASS_BYP_CLK

(

val

)

#define SOC_CTRL_CL_BYPASS_BYP_CLK_MASK

#define SOC_CTRL_CL_BYPASS_BYP_CLK_SHIFT

#define SOC_CTRL_CL_BYPASS_BYP_ISO

(

val

)

#define SOC_CTRL_CL_BYPASS_BYP_ISO_MASK

#define SOC_CTRL_CL_BYPASS_BYP_ISO_SHIFT

#define SOC_CTRL_CL_BYPASS_BYP_POW

(

val

)

#define SOC_CTRL_CL_BYPASS_BYP_POW_MASK

#define SOC_CTRL_CL_BYPASS_BYP_POW_SHIFT

#define SOC_CTRL_CL_BYPASS_CG

(

val

)

#define SOC_CTRL_CL_BYPASS_CG_MASK

#define SOC_CTRL_CL_BYPASS_CG_SHIFT

#define SOC_CTRL_CL_BYPASS_CL_STATE

(

val

)

#define SOC_CTRL_CL_BYPASS_CL_STATE_MASK

Referenced by hal_soc_ctrl_cl_bypass_state_get().

#define SOC_CTRL_CL_BYPASS_CL_STATE_SHIFT

Referenced by hal_soc_ctrl_cl_bypass_state_get().

#define SOC_CTRL_CL_BYPASS_CURRSET

(

val

)

#define SOC_CTRL_CL_BYPASS_CURRSET_MASK

#define SOC_CTRL_CL_BYPASS_CURRSET_SHIFT

#define SOC_CTRL_CL_BYPASS_FLL_PWD

(

val

)

#define SOC_CTRL_CL_BYPASS_FLL_PWD_MASK

#define SOC_CTRL_CL_BYPASS_FLL_PWD_SHIFT

#define SOC_CTRL_CL_BYPASS_FLL_RET

(

val

)

#define SOC_CTRL_CL_BYPASS_FLL_RET_MASK

#define SOC_CTRL_CL_BYPASS_FLL_RET_SHIFT

#define SOC_CTRL_CL_BYPASS_PMUPOWDOWN

(

val

)

#define SOC_CTRL_CL_BYPASS_PMUPOWDOWN_MASK

#define SOC_CTRL_CL_BYPASS_PMUPOWDOWN_SHIFT

#define SOC_CTRL_CL_BYPASS_PROG_DEL

(

val

)

#define SOC_CTRL_CL_BYPASS_PROG_DEL_MASK

#define SOC_CTRL_CL_BYPASS_PROG_DEL_SHIFT

#define SOC_CTRL_CL_BYPASS_PWISO

(

val

)

#define SOC_CTRL_CL_BYPASS_PWISO_MASK

#define SOC_CTRL_CL_BYPASS_PWISO_SHIFT

#define SOC_CTRL_CL_BYPASS_RST

(

val

)

#define SOC_CTRL_CL_BYPASS_RST_MASK

#define SOC_CTRL_CL_BYPASS_RST_SHIFT

#define SOC_CTRL_CL_BYPASS_TRCPOWOK

(

val

)

#define SOC_CTRL_CL_BYPASS_TRCPOWOK_MASK

#define SOC_CTRL_CL_BYPASS_TRCPOWOK_SHIFT

#define SOC_CTRL_CL_ISOLATE_EN

(

val

)

Referenced by hal_soc_ctrl_cl_isolate_set().

#define SOC_CTRL_CL_ISOLATE_EN_MASK

#define SOC_CTRL_CL_ISOLATE_EN_SHIFT

#define SOC_CTRL_CORESTATUS_RO_STATUS

(

val

)

#define SOC_CTRL_CORESTATUS_RO_STATUS_MASK

#define SOC_CTRL_CORESTATUS_RO_STATUS_SHIFT

#define SOC_CTRL_CORESTATUS_STATUS

(

val

)

#define SOC_CTRL_CORESTATUS_STATUS_MASK

#define SOC_CTRL_CORESTATUS_STATUS_SHIFT

#define SOC_CTRL_INFO_NB_CL

(

val

)

#define SOC_CTRL_INFO_NB_CL_MASK

Referenced by hal_soc_ctrl_nb_clusters_get().

#define SOC_CTRL_INFO_NB_CL_SHIFT

#define SOC_CTRL_INFO_NB_CORES

(

val

)

#define SOC_CTRL_INFO_NB_CORES_MASK

Referenced by hal_soc_ctrl_nb_cores_get().

#define SOC_CTRL_INFO_NB_CORES_SHIFT

#define SOC_CTRL_JTAGREG_EXT_BT_MD

(

val

)

#define SOC_CTRL_JTAGREG_EXT_BT_MD_MASK

#define SOC_CTRL_JTAGREG_EXT_BT_MD_SHIFT

#define SOC_CTRL_JTAGREG_EXT_SYNC

(

val

)

#define SOC_CTRL_JTAGREG_EXT_SYNC_MASK

#define SOC_CTRL_JTAGREG_EXT_SYNC_SHIFT

#define SOC_CTRL_JTAGREG_INT_BT_MD

(

val

)

#define SOC_CTRL_JTAGREG_INT_BT_MD_MASK

#define SOC_CTRL_JTAGREG_INT_BT_MD_SHIFT

#define SOC_CTRL_JTAGREG_INT_SYNC

(

val

)

#define SOC_CTRL_JTAGREG_INT_SYNC_MASK

#define SOC_CTRL_JTAGREG_INT_SYNC_SHIFT

#define SOC_CTRL_L2_SLEEP_L2_SLEEP

(

val

)

#define SOC_CTRL_L2_SLEEP_L2_SLEEP_MASK

#define SOC_CTRL_L2_SLEEP_L2_SLEEP_SHIFT

#define SOC_CTRL_REG_CAM_ISO_ISO

(

val

)

#define SOC_CTRL_REG_CAM_ISO_ISO_MASK

#define SOC_CTRL_REG_CAM_ISO_ISO_SHIFT

#define SOC_CTRL_REG_GPIO_ISO_ISO

(

val

)

#define SOC_CTRL_REG_GPIO_ISO_ISO_MASK

#define SOC_CTRL_REG_GPIO_ISO_ISO_SHIFT

#define SOC_CTRL_REG_LVDS_ISO_ISO

(

val

)

#define SOC_CTRL_REG_LVDS_ISO_ISO_MASK

#define SOC_CTRL_REG_LVDS_ISO_ISO_SHIFT

#define SOC_CTRL_SAFE_PADCFG_DRIVE_STRENGTH

(

val

)

#define SOC_CTRL_SAFE_PADCFG_DRIVE_STRENGTH_MASK

#define SOC_CTRL_SAFE_PADCFG_DRIVE_STRENGTH_SHIFT

#define SOC_CTRL_SAFE_PADCFG_PULL_EN

(

val

)

#define SOC_CTRL_SAFE_PADCFG_PULL_EN_MASK

#define SOC_CTRL_SAFE_PADCFG_PULL_EN_SHIFT

#define SOC_CTRL_SAFE_PADFUN_FUNC

(

val

)

#define SOC_CTRL_SAFE_PADFUN_FUNC_MASK

#define SOC_CTRL_SAFE_PADFUN_FUNC_SHIFT

#define SOC_CTRL_SAFE_PADSLEEP_EN

(

val

)

Referenced by hal_pad_padsleep_enable().

#define SOC_CTRL_SAFE_PADSLEEP_EN_MASK

#define SOC_CTRL_SAFE_PADSLEEP_EN_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R0

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R0_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R0_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R1

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R1_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R1_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R2

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R2_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R2_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R3

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R3_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_PD_L2_R3_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R0

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R0_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R0_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R1

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R1_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R1_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R2

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R2_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R2_SHIFT

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R3

(

val

)

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R3_MASK

#define SOC_CTRL_SAFE_PMU_FORCE_RET_L2_R3_SHIFT

#define SOC_CTRL_SAFE_PMU_RAR_LV_VOLT

(

val

)

Referenced by __pi_pmu_voltage_set().

#define SOC_CTRL_SAFE_PMU_RAR_LV_VOLT_MASK

Referenced by __pi_pmu_voltage_set(), and hal_soc_ctrl_pmu_low_volt_get().

#define SOC_CTRL_SAFE_PMU_RAR_LV_VOLT_SHIFT

Referenced by __pi_pmu_voltage_set(), and hal_soc_ctrl_pmu_low_volt_get().

#define SOC_CTRL_SAFE_PMU_RAR_MV_VOLT

(

val

)

#define SOC_CTRL_SAFE_PMU_RAR_MV_VOLT_MASK

Referenced by hal_soc_ctrl_pmu_med_volt_get().

#define SOC_CTRL_SAFE_PMU_RAR_MV_VOLT_SHIFT

Referenced by hal_soc_ctrl_pmu_med_volt_get().

#define SOC_CTRL_SAFE_PMU_RAR_NV_VOLT

(

val

)

Referenced by __pi_pmu_voltage_set().

#define SOC_CTRL_SAFE_PMU_RAR_NV_VOLT_MASK

Referenced by __pi_pmu_voltage_set(), and hal_soc_ctrl_pmu_nom_volt_get().

#define SOC_CTRL_SAFE_PMU_RAR_NV_VOLT_SHIFT

Referenced by __pi_pmu_voltage_set(), and hal_soc_ctrl_pmu_nom_volt_get().

#define SOC_CTRL_SAFE_PMU_RAR_RV_VOLT

(

val

)

#define SOC_CTRL_SAFE_PMU_RAR_RV_VOLT_MASK

Referenced by hal_soc_ctrl_pmu_ret_volt_get().

#define SOC_CTRL_SAFE_PMU_RAR_RV_VOLT_SHIFT

Referenced by hal_soc_ctrl_pmu_ret_volt_get().

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTDEV

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTDEV_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTDEV_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTTYPE

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTTYPE_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_BTTYPE_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_FLL

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_FLL_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_FLL_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_WAKE

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_WAKE_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CL_WAKE_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTINT

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTINT_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTINT_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_SRC

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_SRC_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_SRC_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R0

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R0_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R0_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R1

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R1_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R1_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R2

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R2_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R2_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R3

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R3_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_L2_R3_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SOC_FLL

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SOC_FLL_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SOC_FLL_SHIFT

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_WAKESTATE

(

val

)

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_WAKESTATE_MASK

#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_WAKESTATE_SHIFT

#define SOC_CTRL_SAFE_SLEEPPADCFG_DIR

(

val

)

#define SOC_CTRL_SAFE_SLEEPPADCFG_DIR_MASK

#define SOC_CTRL_SAFE_SLEEPPADCFG_DIR_SHIFT

#define SOC_CTRL_SAFE_SLEEPPADCFG_STATE

(

val

)

#define SOC_CTRL_SAFE_SLEEPPADCFG_STATE_MASK

#define SOC_CTRL_SAFE_SLEEPPADCFG_STATE_SHIFT

#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL

(

val

)

#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_MASK

#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_SHIFT