FreeRTOS port on GAP8/RISC-V
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soc_ctrl_t Struct Reference

Data Fields

volatile uint32_t info
 
volatile uint32_t _reserved_0 [2]
 
volatile uint32_t cl_isolate
 
volatile uint32_t _reserved_1 [23]
 
volatile uint32_t cl_busy
 
volatile uint32_t cl_bypass
 
volatile uint32_t jtagreg
 
volatile uint32_t l2_sleep
 
volatile uint32_t sleep_ctrl
 
volatile uint32_t _reserved_2 [8]
 
volatile uint32_t corestatus
 
volatile uint32_t _reserved_30 [7]
 
volatile uint32_t corestatus_ro
 
volatile uint32_t _reserved_3 [15]
 
volatile uint32_t safe_pmu_rar
 
volatile uint32_t safe_pmu_sleepctrl
 
volatile uint32_t safe_pmu_force
 
volatile uint32_t _reserved_4 [13]
 
volatile uint32_t safe_padfun [4]
 
volatile uint32_t safe_sleeppadcfg [4]
 
volatile uint32_t safe_padsleep
 
volatile uint32_t _reserved_5 [7]
 
volatile uint32_t safe_padcfg [16]
 
volatile uint32_t reg_gpio_iso
 
volatile uint32_t reg_cam_iso
 
volatile uint32_t reg_lvds_iso
 

Description

SOC_CTRL_Type Register Layout Typedef

Field Documentation

volatile uint32_t soc_ctrl_t::_reserved_0[2]

Reserved/Unused.

volatile uint32_t soc_ctrl_t::_reserved_1[23]

Reserved/Unused.

volatile uint32_t soc_ctrl_t::_reserved_2[8]

Reserved/Unused.

volatile uint32_t soc_ctrl_t::_reserved_3[15]

Reserved/Unused.

volatile uint32_t soc_ctrl_t::_reserved_30[7]

Reserved/Unused.

volatile uint32_t soc_ctrl_t::_reserved_4[13]

Reserved/Unused.

volatile uint32_t soc_ctrl_t::_reserved_5[7]

Reserved/Unused.

volatile uint32_t soc_ctrl_t::cl_busy

Cluster busy register.

volatile uint32_t soc_ctrl_t::cl_bypass

Cluster PMU bypass configuration register.

volatile uint32_t soc_ctrl_t::cl_isolate

Isolate cluster register.

volatile uint32_t soc_ctrl_t::corestatus

EOC and chip status register.

volatile uint32_t soc_ctrl_t::corestatus_ro

EOC and chip status register read mirror.

volatile uint32_t soc_ctrl_t::info

Core information register.

volatile uint32_t soc_ctrl_t::jtagreg

JTAG external register.

volatile uint32_t soc_ctrl_t::l2_sleep

L2 sleep configuration register.

volatile uint32_t soc_ctrl_t::reg_cam_iso

CAM power domain pad input isolation register.

volatile uint32_t soc_ctrl_t::reg_gpio_iso

GPIO power domain pad input isolation register.

volatile uint32_t soc_ctrl_t::reg_lvds_iso

LVDS power domain pad input isolation register.

volatile uint32_t soc_ctrl_t::safe_padcfg[16]

Function register : pad 0-3, 4-7, 8-11,..., 56-59, 60-63.

volatile uint32_t soc_ctrl_t::safe_padfun[4]

Mux config register : pad 0-15, 16-31, 32-47, 48-63.

volatile uint32_t soc_ctrl_t::safe_padsleep

Enable Sleep mode for pads.

volatile uint32_t soc_ctrl_t::safe_pmu_force

L2 rententive state configuration.

volatile uint32_t soc_ctrl_t::safe_pmu_rar

DC/DC configuration register.

volatile uint32_t soc_ctrl_t::safe_pmu_sleepctrl

Sleep modes configuration register.

volatile uint32_t soc_ctrl_t::safe_sleeppadcfg[4]

Sleep config register : pad 0-15, 16-31, 32-47, 48-63.

volatile uint32_t soc_ctrl_t::sleep_ctrl

Alias for SAFE_PMU_SLEEPCTRL.