FreeRTOS port on GAP8/RISC-V
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Content | |
PMU_DLC Register Masks | |
EFUSE_CTRL Peripheral Access Layer | |
EFUSE_REGS Peripheral Access Layer | |
Data Structures | |
struct | PMU_DLC_Type |
Macros | |
#define | rtc(id) |
#define | EFUSE_REGS_BASE |
#define | EFUSE_REGS_BASE |
#define | efuse_regs |
#define | efuse_regs_array |
#define | EFUSE_REGS_BASE_ADDRS |
#define | EFUSE_REGS_BASE_ADDRS |
#define | EFUSE_REGS_BASE_PTRS |
#define | EFUSE_REGS_BASE_PTRS |
#define efuse_regs |
Peripheral EFUSE_REGS base pointer
#define efuse_regs_array |
Referenced by hal_efuse_read_byte(), hal_efuse_read_word(), and hal_efuse_write_byte().
#define EFUSE_REGS_BASE |
Peripheral EFUSE_REGS base address
#define EFUSE_REGS_BASE |
Peripheral EFUSE_REGS base address
#define EFUSE_REGS_BASE_ADDRS |
Array initializer of EFUSE_REGS base addresses
#define EFUSE_REGS_BASE_ADDRS |
Array initializer of EFUSE_REGS base addresses
#define EFUSE_REGS_BASE_PTRS |
Array initializer of EFUSE_REGS base pointers
#define EFUSE_REGS_BASE_PTRS |
Array initializer of EFUSE_REGS base pointers
#define rtc | ( | id | ) |
Referenced by hal_rtc_data_get(), hal_rtc_data_set(), hal_rtc_irq_flag_read_reset(), hal_rtc_irq_flag_write_reset(), hal_rtc_request_set(), hal_rtc_status_get(), rtc_apb_cr_get(), rtc_apb_cr_set(), rtc_apb_dr_get(), rtc_apb_dr_set(), rtc_apb_icr_get(), rtc_apb_icr_set(), rtc_apb_ifr_get(), rtc_apb_ifr_set(), rtc_apb_imr_get(), rtc_apb_imr_set(), rtc_apb_sr_get(), and rtc_apb_sr_set().