PMU_DLC Register Masks

Macros
#define	PMU_DLC_BASE
#define	PMU_DLC
#define	PMU_DLC_BASE_ADDRS
#define	PMU_DLC_BASE_PTRS

PCTRL - PMU DLC PICL control register
#define	PMU_DLC_PCTRL_START_MASK
#define	PMU_DLC_PCTRL_START_SHIFT
#define	PMU_DLC_PCTRL_START(x)
#define	PMU_DLC_PCTRL_PADDR_MASK
#define	PMU_DLC_PCTRL_PADDR_SHIFT
#define	PMU_DLC_PCTRL_PADDR(x)
#define	PMU_DLC_PCTRL_DIR_MASK
#define	PMU_DLC_PCTRL_DIR_SHIFT
#define	PMU_DLC_PCTRL_DIR(x)
#define	PMU_DLC_PCTRL_PWDATA_MASK
#define	PMU_DLC_PCTRL_PWDATA_SHIFT
#define	PMU_DLC_PCTRL_PWDATA(x)

PRDATA - PMU DLC PICL data read register
#define	PMU_DLC_PRDATA_PRDATA_MASK
#define	PMU_DLC_PRDATA_PRDATA_SHIFT
#define	PMU_DLC_PRDATA_PRDATA(x)

SR - PMU DLC DLC Status register
#define	PMU_DLC_SR_PICL_BUSY_MASK
#define	PMU_DLC_SR_PICL_BUSY_SHIFT
#define	PMU_DLC_SR_PICL_BUSY(x)
#define	PMU_DLC_SR_SCU_BUSY_MASK
#define	PMU_DLC_SR_SCU_BUSY_SHIFT
#define	PMU_DLC_SR_SCU_BUSY(x)

IMR - PMU DLC Interrupt mask register
#define	PMU_DLC_IMR_ICU_OK_MASK_MASK
#define	PMU_DLC_IMR_ICU_OK_MASK_SHIFT
#define	PMU_DLC_IMR_ICU_OK_MASK(x)
#define	PMU_DLC_IMR_ICU_DELAYED_MASK_MASK
#define	PMU_DLC_IMR_ICU_DELAYED_MASK_SHIFT
#define	PMU_DLC_IMR_ICU_DELAYED_MASK(x)
#define	PMU_DLC_IMR_ICU_MODE_CHANGED_MASK_MASK
#define	PMU_DLC_IMR_ICU_MODE_CHANGED_MASK_SHIFT
#define	PMU_DLC_IMR_ICU_MODE_CHANGED_MASK(x)
#define	PMU_DLC_IMR_PICL_OK_MASK_MASK
#define	PMU_DLC_IMR_PICL_OK_MASK_SHIFT
#define	PMU_DLC_IMR_PICL_OK_MASK(x)
#define	PMU_DLC_IMR_SCU_OK_MASK_MASK
#define	PMU_DLC_IMR_SCU_OK_MASK_SHIFT
#define	PMU_DLC_IMR_SCU_OK_MASK(x)

IFR - PMU DLC Interrupt flag register
#define	PMU_DLC_IFR_ICU_OK_FLAG_MASK
#define	PMU_DLC_IFR_ICU_OK_FLAG_SHIFT
#define	PMU_DLC_IFR_ICU_OK_FLAG(x)
#define	PMU_DLC_IFR_ICU_DELAYED_FLAG_MASK
#define	PMU_DLC_IFR_ICU_DELAYED_FLAG_SHIFT
#define	PMU_DLC_IFR_ICU_DELAYED_FLAG(x)
#define	PMU_DLC_IFR_ICU_MODE_CHANGED_FLAG_MASK
#define	PMU_DLC_IFR_ICU_MODE_CHANGED_FLAG_SHIFT
#define	PMU_DLC_IFR_ICU_MODE_CHANGED_FLAG(x)
#define	PMU_DLC_IFR_PICL_OK_FLAG_MASK
#define	PMU_DLC_IFR_PICL_OK_FLAG_SHIFT
#define	PMU_DLC_IFR_PICL_OK_FLAG(x)
#define	PMU_DLC_IFR_SCU_OK_FLAG_MASK
#define	PMU_DLC_IFR_SCU_OK_FLAG_SHIFT
#define	PMU_DLC_IFR_SCU_OK_FLAG(x)

IOIFR - PMU DLC icu_ok interrupt flag register
#define	PMU_DLC_IOIFR_ICU_OK_FLAG_MASK
#define	PMU_DLC_IOIFR_ICU_OK_FLAG_SHIFT
#define	PMU_DLC_IOIFR_ICU_OK_FLAG(x)

IDIFR - PMU DLC icu_delayed interrupt flag register
#define	PMU_DLC_IDIFR_ICU_DELAYED_FLAG_MASK
#define	PMU_DLC_IDIFR_ICU_DELAYED_FLAG_SHIFT
#define	PMU_DLC_IDIFR_ICU_DELAYED_FLAG(x)

IMCIFR - PMU DLC icu_mode changed interrupt flag register
#define	PMU_DLC_IMCIFR_ICU_MODE_CHANGED_FLAG_MASK
#define	PMU_DLC_IMCIFR_ICU_MODE_CHANGED_FLAG_SHIFT
#define	PMU_DLC_IMCIFR_ICU_MODE_CHANGED_FLAG(x)

PCTRL_PADDR The address to write in the DLC_PADDR register is CHIP_SEL_ADDR[4:0] concatenated with REG_ADDR[4:0].
#define	PMU_DLC_PICL_REG_ADDR_MASK
#define	PMU_DLC_PICL_REG_ADDR_SHIFT
#define	PMU_DLC_PICL_REG_ADDR(x)
#define	PMU_DLC_PICL_CHIP_SEL_ADDR_MASK
#define	PMU_DLC_PICL_CHIP_SEL_ADDR_SHIFT
#define	PMU_DLC_PICL_CHIP_SEL_ADDR(x)
#define	PICL_WIU_ADDR
#define	PICL_ICU_ADDR

Description

Macro Definition Documentation

#define PICL_ICU_ADDR

#define PICL_WIU_ADDR

#define PMU_DLC

Peripheral PMU_DLC base pointer

#define PMU_DLC_BASE

Peripheral PMU DLC base address

#define PMU_DLC_BASE_ADDRS

Array initializer of PMU_DLC base addresses

#define PMU_DLC_BASE_PTRS

Array initializer of PMU_DLC base pointers

#define PMU_DLC_IDIFR_ICU_DELAYED_FLAG

(

x

)

#define PMU_DLC_IDIFR_ICU_DELAYED_FLAG_MASK

#define PMU_DLC_IDIFR_ICU_DELAYED_FLAG_SHIFT

#define PMU_DLC_IFR_ICU_DELAYED_FLAG

(

x

)

#define PMU_DLC_IFR_ICU_DELAYED_FLAG_MASK

#define PMU_DLC_IFR_ICU_DELAYED_FLAG_SHIFT

#define PMU_DLC_IFR_ICU_MODE_CHANGED_FLAG

(

x

)

#define PMU_DLC_IFR_ICU_MODE_CHANGED_FLAG_MASK

#define PMU_DLC_IFR_ICU_MODE_CHANGED_FLAG_SHIFT

#define PMU_DLC_IFR_ICU_OK_FLAG

(

x

)

#define PMU_DLC_IFR_ICU_OK_FLAG_MASK

#define PMU_DLC_IFR_ICU_OK_FLAG_SHIFT

#define PMU_DLC_IFR_PICL_OK_FLAG

(

x

)

#define PMU_DLC_IFR_PICL_OK_FLAG_MASK

#define PMU_DLC_IFR_PICL_OK_FLAG_SHIFT

#define PMU_DLC_IFR_SCU_OK_FLAG

(

x

)

#define PMU_DLC_IFR_SCU_OK_FLAG_MASK

#define PMU_DLC_IFR_SCU_OK_FLAG_SHIFT

#define PMU_DLC_IMCIFR_ICU_MODE_CHANGED_FLAG

(

x

)

#define PMU_DLC_IMCIFR_ICU_MODE_CHANGED_FLAG_MASK

#define PMU_DLC_IMCIFR_ICU_MODE_CHANGED_FLAG_SHIFT

#define PMU_DLC_IMR_ICU_DELAYED_MASK

(

x

)

#define PMU_DLC_IMR_ICU_DELAYED_MASK_MASK

#define PMU_DLC_IMR_ICU_DELAYED_MASK_SHIFT

#define PMU_DLC_IMR_ICU_MODE_CHANGED_MASK

(

x

)

#define PMU_DLC_IMR_ICU_MODE_CHANGED_MASK_MASK

#define PMU_DLC_IMR_ICU_MODE_CHANGED_MASK_SHIFT

#define PMU_DLC_IMR_ICU_OK_MASK

(

x

)

#define PMU_DLC_IMR_ICU_OK_MASK_MASK

#define PMU_DLC_IMR_ICU_OK_MASK_SHIFT

#define PMU_DLC_IMR_PICL_OK_MASK

(

x

)

#define PMU_DLC_IMR_PICL_OK_MASK_MASK

#define PMU_DLC_IMR_PICL_OK_MASK_SHIFT

#define PMU_DLC_IMR_SCU_OK_MASK

(

x

)

#define PMU_DLC_IMR_SCU_OK_MASK_MASK

#define PMU_DLC_IMR_SCU_OK_MASK_SHIFT

#define PMU_DLC_IOIFR_ICU_OK_FLAG

(

x

)

#define PMU_DLC_IOIFR_ICU_OK_FLAG_MASK

#define PMU_DLC_IOIFR_ICU_OK_FLAG_SHIFT

#define PMU_DLC_PCTRL_DIR

(

x

)

#define PMU_DLC_PCTRL_DIR_MASK

#define PMU_DLC_PCTRL_DIR_SHIFT

#define PMU_DLC_PCTRL_PADDR

(

x

)

#define PMU_DLC_PCTRL_PADDR_MASK

#define PMU_DLC_PCTRL_PADDR_SHIFT

#define PMU_DLC_PCTRL_PWDATA

(

x

)

#define PMU_DLC_PCTRL_PWDATA_MASK

#define PMU_DLC_PCTRL_PWDATA_SHIFT

#define PMU_DLC_PCTRL_START

(

x

)

#define PMU_DLC_PCTRL_START_MASK

#define PMU_DLC_PCTRL_START_SHIFT

#define PMU_DLC_PICL_CHIP_SEL_ADDR

(

x

)

#define PMU_DLC_PICL_CHIP_SEL_ADDR_MASK

#define PMU_DLC_PICL_CHIP_SEL_ADDR_SHIFT

#define PMU_DLC_PICL_REG_ADDR

(

x

)

#define PMU_DLC_PICL_REG_ADDR_MASK

#define PMU_DLC_PICL_REG_ADDR_SHIFT

#define PMU_DLC_PRDATA_PRDATA

(

x

)

#define PMU_DLC_PRDATA_PRDATA_MASK

#define PMU_DLC_PRDATA_PRDATA_SHIFT

#define PMU_DLC_SR_PICL_BUSY

(

x

)

#define PMU_DLC_SR_PICL_BUSY_MASK

#define PMU_DLC_SR_PICL_BUSY_SHIFT

#define PMU_DLC_SR_SCU_BUSY

(

x

)

#define PMU_DLC_SR_SCU_BUSY_MASK

#define PMU_DLC_SR_SCU_BUSY_SHIFT