PORT Peripheral Access Layer

Content
	GPIO Register Masks
	IO_ISO Peripheral Access Layer
	SOCEU Peripheral Access Layer
	PMU_DLC Peripheral Access_Layer

Data Structures
struct	PORT_Type

Macros
#define	pwm(id)
#define	pwm_ctrl
#define	EU_EVT_GETCLUSTERBASE(coreId)
#define	pmu_dlc

Description

Macro Definition Documentation

#define EU_EVT_GETCLUSTERBASE

(

coreId

)

Referenced by hal_eu_evt_get_cluster_base().

#define pmu_dlc

Referenced by hal_pmu_dlc_idifr_get(), hal_pmu_dlc_imcifr_get(), hal_pmu_dlc_ioifr_get(), pmu_dlc_dlc_idifr_get(), pmu_dlc_dlc_idifr_set(), pmu_dlc_dlc_ifr_get(), pmu_dlc_dlc_ifr_set(), pmu_dlc_dlc_imcifr_get(), pmu_dlc_dlc_imcifr_set(), pmu_dlc_dlc_imr_get(), pmu_dlc_dlc_imr_set(), pmu_dlc_dlc_ioifr_get(), pmu_dlc_dlc_ioifr_set(), pmu_dlc_dlc_pctrl_get(), pmu_dlc_dlc_pctrl_set(), pmu_dlc_dlc_prdata_get(), and pmu_dlc_dlc_sr_get().

#define pwm

(

id

)

Referenced by __initialize_ch_mux(), hal_pwm_channel_mode_set(), hal_pwm_channel_th_mode_set(), hal_pwm_channel_th_set(), hal_pwm_ctrl_cg_disable(), hal_pwm_ctrl_cg_enable(), hal_pwm_ctrl_evt_cfg_disable(), hal_pwm_ctrl_evt_cfg_enable(), hal_pwm_ctrl_evt_cfg_sel0_set(), hal_pwm_ctrl_evt_cfg_sel1_set(), hal_pwm_ctrl_evt_cfg_sel2_set(), hal_pwm_ctrl_evt_cfg_sel3_set(), pwm_ch_threshold_get(), pwm_ch_threshold_set(), pwm_cmd_get(), pwm_cmd_set(), pwm_config_get(), pwm_config_set(), pwm_counter_get(), pwm_threshold_get(), and pwm_threshold_set().

#define pwm_ctrl

Referenced by pwm_ctrl_cg_get(), pwm_ctrl_cg_set(), pwm_ctrl_event_cfg_get(), and pwm_ctrl_event_cfg_set().