Data Structures
union	MVENDORID_Type
	Union type to access the Vendor ID Register (MVENDORID). More...

union	MHARTID_Type
	Union type to access the Hart ID Register (MHARTID). More...

union	MISA_Type
	Union type to access the ISA and Extensions Register (MISA). More...

union	MSTATUS_Type
	Union type to access the Machine Mode Status Register (MSTATUS). More...

union	MTVEC_Type
	Union type to access the Machine Trap-Vector Baser-Address Register (MTVEC). More...

union	MCAUSE_Type
	Union type to access the Machine Trap Cause Register (MCAUSE). More...

union	CPRIV_Type
	Union type to access the Current Privilege Level Register (CPRIV). More...

union	PCMR_Type
	Union type to access the Performance Counter Mode Register (PCMR). More...

union	PCER_Type
	Union type to access the Performance Counter Event Register (PCER). More...

struct	NVIC_Type
	Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

struct	SCB_Type
	Structure type to access the System Control Block (SCB). More...

struct	SCBC_Type

struct	SysTick_Type
	Structure type to access the System Timer (SysTick). More...

struct	TimerL_Type
	Structure type to access the System Timer Low. More...

struct	TimerH_Type
	Structure type to access the System Timer Low. More...

struct	EU_CORE_DEMUX_Type
	Structure type to access the EU_CORE_DEMUX. More...

struct	EU_SEC_DEMUX_Type
	Structure type to access the EU_SEC_DEMUX. More...

struct	EU_LOOP_DEMUX_Type
	Structure type to access the EU_LOOP_DEMUX. More...

struct	EU_SW_EVENTS_DEMUX_Type
	Structure type to access the EU_SW_EVENTS_DEMUX. More...

struct	EU_DISPATCH_DEMUX_Type

struct	EU_MUTEX_DEMUX_Type

struct	EU_BARRIER_DEMUX_Type

struct	EU_SOC_EVENTS_Type

struct	DMAMCHAN_Type
	Structure type to access the direct memory access (DMAMCHAN). More...

struct	DMAMCHAN_COMPRESSOR_Type
	Structure type to access the direct memory access compressor (DMAMCHAN). More...

Macros
#define	MSTATUS_ADDR

#define	MISA_ADDR

#define	MTVEC_ADDR

#define	MEPC_ADDR

#define	MCAUSE_ADDR

#define	MVENDORID_ADDR

#define	MARCHID_ADDR

#define	MIMPID_ADDR

#define	MHARTID_ADDR

#define	PCER_ADDR

#define	PCMR_ADDR

#define	PERF_CYCLE_OFFSET

#define	PERF_INSTR_OFFSET

#define	PERF_LD_STALL_OFFSET

#define	PERF_JR_STALL_OFFSET

#define	PERF_IMISS_OFFSET

#define	PERF_LD_OFFSET

#define	PERF_ST_OFFSET

#define	PERF_JUMP_OFFSET

#define	PERF_BRANCH_OFFSET

#define	PERF_BTAKEN_OFFSET

#define	PERF_RVC_OFFSET

#define	PERF_LD_EXT_OFFSET

#define	PERF_ST_EXT_OFFSET

#define	PERF_LD_EXT_CYC_OFFSET

#define	PERF_ST_EXT_CYC_OFFSET

#define	PERF_TCDM_COUNT_OFFSET

#define	PERF_ALL_OFFSET

#define	PCCR_ADDR(x)

#define	HWLP_S0_ADDR

#define	HWLP_E0_ADDR

#define	HWLP_C0_ADDR

#define	HWLP_S1_ADDR

#define	HWLP_E1_ADDR

#define	HWLP_C1_ADDR

#define	DMHARTID_ADDR

#define	UEPC_ADDR

#define	CPRIV_ADDR

#define	USTATUS_FC_ADDR

#define	UTVEC_FC_ADDR

#define	UCAUSE_FC_ADDR

#define	MVENDORID_BANK_Pos

#define	MVENDORID_BANK_Msk

#define	MVENDORID_OFFSET_Pos

#define	MVENDORID_OFFSET_Msk

#define	MHARTID_BANK_Pos

#define	MHARTID_BANK_Msk

#define	MISA_MXL_Pos

#define	MISA_MXL_Msk

#define	MISA_EXTENSION_Pos

#define	MISA_EXTENSION_Msk

#define	MSTATUS_SD_Pos

#define	MSTATUS_SD_Msk

#define	MSTATUS_TSR_Pos

#define	MSTATUS_TSR_Msk

#define	MSTATUS_TW_Pos

#define	MSTATUS_TW_Msk

#define	MSTATUS_TVM_Pos

#define	MSTATUS_TVM_Msk

#define	MSTATUS_MXR_Pos

#define	MSTATUS_MXR_Msk

#define	MSTATUS_SUM_Pos

#define	MSTATUS_SUM_Msk

#define	MSTATUS_MPRV_Pos

#define	MSTATUS_MPRV_Msk

#define	MSTATUS_XS_Pos

#define	MSTATUS_XS_Msk

#define	MSTATUS_FS_Pos

#define	MSTATUS_FS_Msk

#define	MSTATUS_MPP_Pos

#define	MSTATUS_MPP_Msk

#define	MSTATUS_SPP_Pos

#define	MSTATUS_SPP_Msk

#define	MSTATUS_MPIE_Pos

#define	MSTATUS_MPIE_Msk

#define	MSTATUS_SPIE_Pos

#define	MSTATUS_SPIE_Msk

#define	MSTATUS_UPIE_Pos

#define	MSTATUS_UPIE_Msk

#define	MSTATUS_MIE_Pos

#define	MSTATUS_MIE_Msk

#define	MSTATUS_SIE_Pos

#define	MSTATUS_SIE_Msk

#define	MSTATUS_UIE_Pos

#define	MSTATUS_UIE_Msk

#define	MTVEC_BASE_Pos

#define	MTVEC_BASE_Msk

#define	MTVEC_MODE_Pos

#define	MTVEC_MODE_Msk

#define	MCAUSE_IRQ_Pos

#define	MCAUSE_IRQ_Msk

#define	MCAUSE_EC_Pos

#define	MCAUSE_EC_Msk

#define	CPRIV_PRIV_Pos

#define	CPRIV_PRIV_Msk

#define	PCMR_GLBEN_Pos

#define	PCMR_GLBEN_Msk

#define	PCMR_SATU_Pos

#define	PCMR_SATU_Msk

#define	PCER_CYCLE_Pos

#define	PCER_CYCLE_Msk

#define	PCER_INSTR_Pos

#define	PCER_INSTR_Msk

#define	PCER_LD_STALL_Pos

#define	PCER_LD_STALL_Msk

#define	PCER_JMP_STALL_Pos

#define	PCER_JMP_STALL_Msk

#define	PCER_IMISS_Pos

#define	PCER_IMISS_Msk

#define	PCER_WBRANCH_Pos

#define	PCER_WBRANCH_Msk

#define	PCER_WBRANCH_CYC_Pos

#define	PCER_WBRANCH_CYC_Msk

#define	PCER_LD_Pos

#define	PCER_LD_Msk

#define	PCER_ST_Pos

#define	PCER_ST_Msk

#define	PCER_JUMP_Pos

#define	PCER_JUMP_Msk

#define	PCER_BRANCH_Pos

#define	PCER_BRANCH_Msk

#define	PCER_DELAY_SLOT_Pos

#define	PCER_DELAY_SLOT_Msk

#define	PCER_LD_EXT_Pos

#define	PCER_LD_EXT_Msk

#define	PCER_ST_EXT_Pos

#define	PCER_ST_EXT_Msk

#define	PCER_LD_EXT_CYC_Pos

#define	PCER_LD_EXT_CYC_Msk

#define	PCER_ST_EXT_CYC_Pos

#define	PCER_ST_EXT_CYC_Msk

#define	PCER_TCDM_CONT_Pos

#define	PCER_TCDM_CONT_Msk

#define	PCER_EVENTS_NUM

#define	SCB_EOC_Pos

#define	SCB_EOC_Msk

#define	SCB_FETCH_EN_Pos

#define	SCB_FETCH_EN_Msk

#define	SCBC_ENABLE_Pos

#define	SCBC_ENABLE_Msk

#define	SCBC_STATUS_Pos

#define	SCBC_STATUS_Msk

#define	TIMERL_CFG_REG_LOW_64BIT_Pos

#define	TIMERL_CFG_REG_LOW_64BIT_Msk

#define	TIMERL_CFG_REG_LOW_PRESCALER_Pos

#define	TIMERL_CFG_REG_LOW_PRESCALER_Msk

#define	TIMERL_CFG_REG_LOW_CLKS_Pos

#define	TIMERL_CFG_REG_LOW_CLKS_Msk

#define	TIMERL_CFG_REG_LOW_PRESCALERE_Pos

#define	TIMERL_CFG_REG_LOW_PRESCALERE_Msk

#define	TIMERL_CFG_REG_LOW_ONE_SHOT_Pos

#define	TIMERL_CFG_REG_LOW_ONE_SHOT_Msk

#define	TIMERL_CFG_REG_LOW_CMP_CLR_Pos

#define	TIMERL_CFG_REG_LOW_CMP_CLR_Msk

#define	TIMERL_CFG_REG_LOW_IEM_Pos

#define	TIMERL_CFG_REG_LOW_IEM_Msk

#define	TIMERL_CFG_REG_LOW_IRQE_Pos

#define	TIMERL_CFG_REG_LOW_IRQE_Msk

#define	TIMERL_CFG_REG_LOW_RESET_Pos

#define	TIMERL_CFG_REG_LOW_RESET_Msk

#define	TIMERL_CFG_REG_LOW_ENABLE_Pos

#define	TIMERL_CFG_REG_LOW_ENABLE_Msk

#define	TIMERH_CFG_REG_HIGH_ERCLK_Pos

#define	TIMERH_CFG_REG_HIGH_ERCLK_Msk

#define	TIMERH_CFG_REG_HIGH_PRESCALERE_Pos

#define	TIMERH_CFG_REG_HIGH_PRESCALERE_Msk

#define	TIMERH_CFG_REG_HIGH_ONE_SHOT_Pos

#define	TIMERH_CFG_REG_HIGH_ONE_SHOT_Msk

#define	TIMERH_CFG_REG_HIGH_CMP_CLR_Pos

#define	TIMERH_CFG_REG_HIGH_CMP_CLR_Msk

#define	TIMERH_CFG_REG_HIGH_IEM_Pos

#define	TIMERH_CFG_REG_HIGH_IEM_Msk

#define	TIMERH_CFG_REG_HIGH_IRQE_Pos

#define	TIMERH_CFG_REG_HIGH_IRQE_Msk

#define	TIMERH_CFG_REG_HIGH_RESET_Pos

#define	TIMERH_CFG_REG_HIGH_RESET_Msk

#define	TIMERH_CFG_REG_HIGH_ENABLE_Pos

#define	TIMERH_CFG_REG_HIGH_ENABLE_Msk

#define	SysTick_CFG_REG_LOW_64BIT_Pos

#define	SysTick_CFG_REG_LOW_64BIT_Msk

#define	SysTick_CFG_REG_LOW_PRESCALER_Pos

#define	SysTick_CFG_REG_LOW_PRESCALER_Msk

#define	SysTick_CFG_REG_LOW_CLKS_Pos

#define	SysTick_CFG_REG_LOW_CLKS_Msk

#define	SysTick_CFG_REG_LOW_PRESCALERE_Pos

#define	SysTick_CFG_REG_LOW_PRESCALERE_Msk

#define	SysTick_CFG_REG_LOW_ONE_SHOT_Pos

#define	SysTick_CFG_REG_LOW_ONE_SHOT_Msk

#define	SysTick_CFG_REG_LOW_CMP_CLR_Pos

#define	SysTick_CFG_REG_LOW_CMP_CLR_Msk

#define	SysTick_CFG_REG_LOW_IEM_Pos

#define	SysTick_CFG_REG_LOW_IEM_Msk

#define	SysTick_CFG_REG_LOW_IRQE_Pos

#define	SysTick_CFG_REG_LOW_IRQE_Msk

#define	SysTick_CFG_REG_LOW_RESET_Pos

#define	SysTick_CFG_REG_LOW_RESET_Msk

#define	SysTick_CFG_REG_LOW_ENABLE_Pos

#define	SysTick_CFG_REG_LOW_ENABLE_Msk

#define	SysTick_CFG_REG_HIGH_ERCLK_Pos

#define	SysTick_CFG_REG_HIGH_ERCLK_Msk

#define	SysTick_CFG_REG_HIGH_PRESCALERE_Pos

#define	SysTick_CFG_REG_HIGH_PRESCALERE_Msk

#define	SysTick_CFG_REG_HIGH_ONE_SHOT_Pos

#define	SysTick_CFG_REG_HIGH_ONE_SHOT_Msk

#define	SysTick_CFG_REG_HIGH_CMP_CLR_Pos

#define	SysTick_CFG_REG_HIGH_CMP_CLR_Msk

#define	SysTick_CFG_REG_HIGH_IEM_Pos

#define	SysTick_CFG_REG_HIGH_IEM_Msk

#define	SysTick_CFG_REG_HIGH_IRQE_Pos

#define	SysTick_CFG_REG_HIGH_IRQE_Msk

#define	SysTick_CFG_REG_HIGH_RESET_Pos

#define	SysTick_CFG_REG_HIGH_RESET_Msk

#define	SysTick_CFG_REG_HIGH_ENABLE_Pos

#define	SysTick_CFG_REG_HIGH_ENABLE_Msk

#define	EU_SEC_ELEM_NUM

#define	EU_LOOP_DEMUX_DONE_

#define	EU_LOOP_DEMUX_LOCKED_

#define	EU_LOOP_DEMUX_SKIP_

#define	EU_DISPATCH_DEMUX_ELEM_NUM

#define	EU_MUTEX_DEMUX_ELEM_NUM

#define	EU_CURRENT_VALID_BIT_MASK

#define	EU_CURRENT_VALID_BIT_SHIFT

#define	EU_CURRENT_VALID_BIT(x)

#define	EU_CURRENT_SOC_EVENT_MASK

#define	DMAMCHAN_CMD_TID_Pos

#define	DMAMCHAN_CMD_TID_Msk

#define	DMAMCHAN_CMD_BLE_Pos

#define	DMAMCHAN_CMD_BLE_Msk

#define	DMAMCHAN_CMD_ILE_Pos

#define	DMAMCHAN_CMD_ILE_Msk

#define	DMAMCHAN_CMD_ELE_Pos

#define	DMAMCHAN_CMD_ELE_Msk

#define	DMAMCHAN_CMD_2D_Pos

#define	DMAMCHAN_CMD_2D_Msk

#define	DMAMCHAN_CMD_INC_Pos

#define	DMAMCHAN_CMD_INC_Msk

#define	DMAMCHAN_CMD_TYP_Pos

#define	DMAMCHAN_CMD_TYP_Msk

#define	DMAMCHAN_CMD_LEN_Pos

#define	DMAMCHAN_CMD_LEN_Msk

#define	DMAMCHAN_CMD_2D_STRIDE_Pos

#define	DMAMCHAN_CMD_2D_STRIDE_Msk

#define	DMAMCHAN_CMD_2D_COUNT_Pos

#define	DMAMCHAN_CMD_2D_COUNT_Msk

#define	CL_PERI_BASE

#define	FC_BASE

#define	SOC_ROM_BASE

#define	SOC_PERI_BASE

#define	CORE_PERI_BASE

#define	CORE_SCB_BASE

#define	CORE_SCBC_BASE

#define	CORE_EU_BASE

#define	CORE_EU_BARRIER_BASE

#define	CORE_EU_SW_EVENTS_BASE

#define	CORE_EU_SOC_EVENTS_BASE

#define	CORE_EU_EXT_EVENTS_BASE

#define	CORE_EU_DEMUX_BASE

#define	CORE_EU_CORE_DEMUX_BASE

#define	CORE_EU_SEC_DEMUX_BASE

#define	CORE_EU_LOOP_DEMUX_BASE

#define	CORE_EU_DISPATCH_DEMUX_BASE

#define	CORE_EU_MUTEX_DEMUX_BASE

#define	CORE_EU_SW_EVENTS_DEMUX_BASE

#define	CORE_EU_BARRIER_DEMUX_BASE

#define	CORE_SysTick_BASE

#define	TIMER0_BASE

#define	TIMER1_BASE

#define	NVIC_BASE

#define	CORE_MCHAN_CL_BASE

#define	CORE_MCHAN_FC_BASE

#define	CORE_MCHAN_COMPRESSOR_BASE

#define	CORE_MCHAN_BASE

#define	FC_SCBC_BASE

#define	FC_SysTick_BASE

#define	FC_EU_BARRIER_BASE

#define	FC_EU_SW_EVENTS_BASE

#define	FC_EU_SOC_EVENTS_BASE

#define	FC_EU_EXT_EVENTS_BASE

#define	FC_EU_CORE_DEMUX_BASE

#define	FC_EU_SEC_DEMUX_BASE

#define	FC_EU_LOOP_DEMUX_BASE

#define	FC_EU_DISPATCH_DEMUX_BASE

#define	FC_EU_MUTEX_DEMUX_BASE

#define	FC_EU_SW_EVENTS_DEMUX_BASE

#define	FC_EU_BARRIER_DEMUX_BASE

#define	FC_MCHAN_BASE

#define	SCBC

#define	SysTick

#define	TIMERL

#define	TIMERH

#define	EU_SW_EVENTS

#define	EU_SOC_EVENTS

#define	NVIC

#define	EU_CORE_DEMUX

#define	EU_SEC_DEMUX

#define	EU_LOOP_DEMUX

#define	EU_DISPATCH_DEMUX

#define	EU_MUTEX_DEMUX

#define	EU_SW_EVENTS_DEMUX

#define	EU_BARRIER_DEMUX(id)

#define	DMAMCHAN

#define	DMAMCHAN_COMPRESSOR

#define	FC_EU_SW_EVENTS

#define	FC_CLUSTER_ID

#define	FC_CORE_ID

#define	NVIC_EnableIRQ

#define	NVIC_GetEnableIRQ

#define	NVIC_DisableIRQ

#define	NVIC_GetPendingIRQ

#define	NVIC_SetPendingIRQ

#define	NVIC_ClearPendingIRQ

#define	NVIC_GetActive

#define	NVIC_SystemReset

#define	NVIC_SetVector

#define	NVIC_GetVector

#define	NVIC_USER_IRQ_OFFSET

#define	NVIC_M_IRQ_OFFSET


#define	__GAP_CMSIS_VERSION_MAIN

#define	__GAP_CMSIS_VERSION_SUB

#define	__GAP_CMSIS_VERSION

#define	__GAP_V

#define	__CORE_GAP_H_DEPENDANT

#define	__I

#define	__O

#define	__IO

#define	__IM

#define	__OM

#define	__IOM

Typedefs
typedef struct SysTick_Type	timer_periph_t

Functions
__STATIC_INLINE void	__NVIC_EnableIRQ (uint32_t IRQn)
	Enable Interrupt. More...

__STATIC_INLINE uint32_t	__NVIC_GetEnableIRQ (uint32_t IRQn)
	Get Interrupt Enable status. More...

__STATIC_INLINE void	__NVIC_DisableIRQ (uint32_t IRQn)
	Disable Interrupt. More...

__STATIC_INLINE uint32_t	__NVIC_GetPendingIRQ (uint32_t IRQn)
	Get Pending Interrupt. More...

__STATIC_INLINE void	__NVIC_SetPendingIRQ (uint32_t IRQn)
	Set Pending Interrupt. More...

__STATIC_INLINE void	__NVIC_ClearPendingIRQ (uint32_t IRQn)
	Clear Pending Interrupt. More...

__STATIC_INLINE uint32_t	__NVIC_GetActive (uint32_t IRQn)
	Get Active Interrupt. More...

__STATIC_INLINE uint32_t	__NVIC_ForgeItVect (uint32_t ItBaseAddr, uint32_t ItIndex, uint32_t ItHandler)

__STATIC_INLINE void	__NVIC_SetVector (uint32_t IRQn, uint32_t vector)
	Set Interrupt Vector. More...

__STATIC_INLINE uint32_t	__NVIC_GetVector (uint32_t IRQn)
	Get Interrupt Vector. More...

__STATIC_INLINE void	__NVIC_SystemReset (void)
	System Reset. More...

	__attribute__ ((always_inline)) __STATIC_INLINE uint32_t __core_ID()

	__attribute__ ((always_inline)) __STATIC_INLINE void __PCER_Set(uint32_t eventMask)

Macro Definition Documentation

#define __CORE_GAP_H_DEPENDANT

#define __GAP_CMSIS_VERSION

CMSIS HAL version number

#define __GAP_CMSIS_VERSION_MAIN

[31:16] CMSIS HAL main version

#define __GAP_CMSIS_VERSION_SUB

[15:0] CMSIS HAL sub version

#define __GAP_V

GAP Core Version

#define __I

Defines 'read only' permissions

#define __IM

#define __IO

Defines 'read / write' permissions

#define __IOM

#define __O

Defines 'write only' permissions

#define __OM

Data Structures

Macros

Typedefs

Functions

Macro Definition Documentation