FreeRTOS port on GAP8/RISC-V
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Macros | |
#define | REG_MBR0 |
#define | REG_MBR1 |
#define | REG_ACCESS |
#define | MEM_ACCESS |
#define | RAM |
#define | FLASH |
#define | READ |
#define | WRITE |
Functions | |
static void | hyper_udma_channel_set (uint32_t device_id, udma_channel_e channel, uint32_t l2buf, uint32_t size, uint32_t cfg) |
static void | hyper_ext_addr_set (uint32_t ext_addr) |
static uint32_t | hyper_ext_addr_get () |
static void | hyper_mem_cfg0_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg0_get () |
static void | hyper_mem_cfg1_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg1_get () |
static void | hyper_mem_cfg2_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg2_get () |
static void | hyper_mem_cfg3_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg3_get () |
static void | hyper_mem_cfg4_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg4_get () |
static void | hyper_mem_cfg5_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg5_get () |
static void | hyper_mem_cfg6_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg6_get () |
static void | hyper_mem_cfg7_set (uint32_t cfg) |
static uint32_t | hyper_mem_cfg7_get () |
static void | hyper_mbr0_set (uint8_t mbr) |
static void | hyper_latency0_set (uint8_t latency) |
static void | hyper_wrap_size0_set (uint8_t wrap_size) |
static void | hyper_rd_cshi0_set (uint8_t value) |
static void | hyper_rd_css0_set (uint8_t value) |
static void | hyper_rd_csh0_set (uint8_t value) |
static void | hyper_wr_cshi0_set (uint8_t value) |
static void | hyper_wr_css0_set (uint8_t value) |
static void | hyper_wr_csh0_set (uint8_t value) |
static void | hyper_rd_max_length0_set (uint16_t max_len) |
static void | hyper_wr_max_length0_set (uint16_t max_len) |
static void | hyper_acs0_set (uint8_t value) |
static void | hyper_tco0_set (uint8_t value) |
static void | hyper_dt0_set (uint8_t value) |
static void | hyper_crt0_set (uint8_t value) |
static void | hyper_rd_max_length0_en_set (uint8_t value) |
static void | hyper_wr_max_length0_en_set (uint8_t value) |
static void | hyper_rds_delay_adj_set (uint8_t value) |
static void | hyper_mbr1_set (uint8_t mbr) |
static void | hyper_latency1_set (uint8_t latency) |
static void | hyper_wrap_size1_set (uint8_t wrap_size) |
static void | hyper_rd_cshi1_set (uint8_t value) |
static void | hyper_rd_css1_set (uint8_t value) |
static void | hyper_rd_csh1_set (uint8_t value) |
static void | hyper_wr_cshi1_set (uint8_t value) |
static void | hyper_wr_css1_set (uint8_t value) |
static void | hyper_wr_csh1_set (uint8_t value) |
static void | hyper_rd_max_length1_set (uint16_t max_len) |
static void | hyper_wr_max_length1_set (uint16_t max_len) |
static void | hyper_acs1_set (uint8_t value) |
static void | hyper_tco1_set (uint8_t value) |
static void | hyper_dt1_set (uint8_t value) |
static void | hyper_crt1_set (uint8_t value) |
static void | hyper_rd_max_length1_en_set (uint8_t value) |
static void | hyper_wr_max_length1_en_set (uint8_t value) |
static void | hyper_max_length_set (uint16_t max_length, uint8_t max_length_en, uint8_t read, uint8_t cs) |
static void | hyper_timing_set (uint32_t cshi, uint32_t css, uint32_t csh, uint32_t latency, uint8_t read, uint8_t cs) |
static void | hal_hyper_enqueue (uint32_t device_id, uint32_t channel, uint32_t ext_addr, uint32_t l2buf, uint32_t size, uint32_t cfg) |
#define FLASH |
#define MEM_ACCESS |
Referenced by __attribute__().
#define RAM |
#define READ |
Referenced by hyper_max_length_set(), and hyper_timing_set().
#define REG_ACCESS |
#define REG_MBR0 |
Referenced by __attribute__().
#define REG_MBR1 |
Referenced by __attribute__(), pi_hyper_read_2d_async(), pi_hyper_read_async(), pi_hyper_write_2d_async(), and pi_hyper_write_async().
#define WRITE |
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inlinestatic |
References hyper_ext_addr_set(), hyper_udma_channel_set(), and UDMA_CFG_DATA_SIZE.
Referenced by hyper_handler().
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inlinestatic |
MEM_CFG3.
References hyper_mem_cfg3_get(), hyper_mem_cfg3_set(), HYPERBUS_MEM_CFG3_ACS0, and HYPERBUS_MEM_CFG3_ACS0_MASK.
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MEM_CFG7.
References hyper_mem_cfg7_get(), hyper_mem_cfg7_set(), HYPERBUS_MEM_CFG7_ACS1, and HYPERBUS_MEM_CFG7_ACS1_MASK.
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inlinestatic |
References hyper_mem_cfg3_get(), hyper_mem_cfg3_set(), HYPERBUS_MEM_CFG3_CRT0, and HYPERBUS_MEM_CFG3_CRT0_MASK.
Referenced by __attribute__().
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inlinestatic |
References hyper_mem_cfg7_get(), hyper_mem_cfg7_set(), HYPERBUS_MEM_CFG7_CRT1, and HYPERBUS_MEM_CFG7_CRT1_MASK.
Referenced by __attribute__().
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inlinestatic |
References hyper_mem_cfg3_get(), hyper_mem_cfg3_set(), HYPERBUS_MEM_CFG3_DT0, and HYPERBUS_MEM_CFG3_DT0_MASK.
Referenced by __attribute__().
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inlinestatic |
References hyper_mem_cfg7_get(), hyper_mem_cfg7_set(), HYPERBUS_MEM_CFG7_DT1, and HYPERBUS_MEM_CFG7_DT1_MASK.
Referenced by __attribute__().
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inlinestatic |
References hal_read32(), and hyperbus.
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References hal_write32(), and hyperbus.
Referenced by hal_hyper_enqueue().
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References hyper_mem_cfg0_get(), hyper_mem_cfg0_set(), HYPERBUS_MEM_CFG0_LATENCY0, and HYPERBUS_MEM_CFG0_LATENCY0_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg4_get(), hyper_mem_cfg4_set(), HYPERBUS_MEM_CFG4_LATENCY1, and HYPERBUS_MEM_CFG4_LATENCY1_MASK.
Referenced by hyper_timing_set().
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MEM_CFG0.
References hyper_mem_cfg0_get(), hyper_mem_cfg0_set(), HYPERBUS_MEM_CFG0_MBR0, and HYPERBUS_MEM_CFG0_MBR0_MASK.
Referenced by __attribute__().
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MEM_CFG4.
References hyper_mem_cfg4_get(), hyper_mem_cfg4_set(), HYPERBUS_MEM_CFG4_MBR1, and HYPERBUS_MEM_CFG4_MBR1_MASK.
Referenced by __attribute__().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_latency0_set(), hyper_mbr0_set(), and hyper_wrap_size0_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_latency0_set(), hyper_mbr0_set(), and hyper_wrap_size0_set().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_rd_csh0_set(), hyper_rd_cshi0_set(), hyper_rd_css0_set(), hyper_wr_csh0_set(), hyper_wr_cshi0_set(), and hyper_wr_css0_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_rd_csh0_set(), hyper_rd_cshi0_set(), hyper_rd_css0_set(), hyper_wr_csh0_set(), hyper_wr_cshi0_set(), and hyper_wr_css0_set().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_rd_max_length0_set(), and hyper_wr_max_length0_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_rd_max_length0_set(), and hyper_wr_max_length0_set().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_acs0_set(), hyper_crt0_set(), hyper_dt0_set(), hyper_rd_max_length0_en_set(), hyper_rds_delay_adj_set(), hyper_tco0_set(), and hyper_wr_max_length0_en_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_acs0_set(), hyper_crt0_set(), hyper_dt0_set(), hyper_rd_max_length0_en_set(), hyper_rds_delay_adj_set(), hyper_tco0_set(), and hyper_wr_max_length0_en_set().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_latency1_set(), hyper_mbr1_set(), and hyper_wrap_size1_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_latency1_set(), hyper_mbr1_set(), and hyper_wrap_size1_set().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_rd_csh1_set(), hyper_rd_cshi1_set(), hyper_rd_css1_set(), hyper_wr_csh1_set(), hyper_wr_cshi1_set(), and hyper_wr_css1_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_rd_csh1_set(), hyper_rd_cshi1_set(), hyper_rd_css1_set(), hyper_wr_csh1_set(), hyper_wr_cshi1_set(), and hyper_wr_css1_set().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_rd_max_length1_set(), and hyper_wr_max_length1_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_rd_max_length1_set(), and hyper_wr_max_length1_set().
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inlinestatic |
References hal_read32(), and hyperbus.
Referenced by hyper_acs1_set(), hyper_crt1_set(), hyper_dt1_set(), hyper_rd_max_length1_en_set(), hyper_tco1_set(), and hyper_wr_max_length1_en_set().
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inlinestatic |
References hal_write32(), and hyperbus.
Referenced by hyper_acs1_set(), hyper_crt1_set(), hyper_dt1_set(), hyper_rd_max_length1_en_set(), hyper_tco1_set(), and hyper_wr_max_length1_en_set().
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inlinestatic |
References hyper_mem_cfg1_get(), hyper_mem_cfg1_set(), HYPERBUS_MEM_CFG1_RD_CSH0, and HYPERBUS_MEM_CFG1_RD_CSH0_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg5_get(), hyper_mem_cfg5_set(), HYPERBUS_MEM_CFG5_RD_CSH1, and HYPERBUS_MEM_CFG5_RD_CSH1_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
MEM_CFG1.
References hyper_mem_cfg1_get(), hyper_mem_cfg1_set(), HYPERBUS_MEM_CFG1_RD_CSHI0, and HYPERBUS_MEM_CFG1_RD_CSHI0_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
MEM_CFG5.
References hyper_mem_cfg5_get(), hyper_mem_cfg5_set(), HYPERBUS_MEM_CFG5_RD_CSHI1, and HYPERBUS_MEM_CFG5_RD_CSHI1_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg1_get(), hyper_mem_cfg1_set(), HYPERBUS_MEM_CFG1_RD_CSS0, and HYPERBUS_MEM_CFG1_RD_CSS0_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg5_get(), hyper_mem_cfg5_set(), HYPERBUS_MEM_CFG5_RD_CSS1, and HYPERBUS_MEM_CFG5_RD_CSS1_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg3_get(), hyper_mem_cfg3_set(), HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0, and HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0_MASK.
Referenced by hyper_max_length_set().
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inlinestatic |
MEM_CFG2.
References hyper_mem_cfg2_get(), hyper_mem_cfg2_set(), HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0, and HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0_MASK.
Referenced by hyper_max_length_set().
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inlinestatic |
References hyper_mem_cfg7_get(), hyper_mem_cfg7_set(), HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1, and HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1_MASK.
Referenced by hyper_max_length_set().
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inlinestatic |
MEM_CFG6.
References hyper_mem_cfg6_get(), hyper_mem_cfg6_set(), HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1, and HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1_MASK.
Referenced by hyper_max_length_set().
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inlinestatic |
References hyper_latency0_set(), hyper_latency1_set(), hyper_rd_csh0_set(), hyper_rd_csh1_set(), hyper_rd_cshi0_set(), hyper_rd_cshi1_set(), hyper_rd_css0_set(), hyper_rd_css1_set(), hyper_wr_csh0_set(), hyper_wr_csh1_set(), hyper_wr_cshi0_set(), hyper_wr_cshi1_set(), hyper_wr_css0_set(), hyper_wr_css1_set(), and READ.
Referenced by __attribute__().
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inlinestatic |
References hyperbus, and udma_enqueue_channel().
Referenced by hal_hyper_enqueue().
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inlinestatic |
References hyper_mem_cfg1_get(), hyper_mem_cfg1_set(), HYPERBUS_MEM_CFG1_WR_CSH0, and HYPERBUS_MEM_CFG1_WR_CSH0_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg5_get(), hyper_mem_cfg5_set(), HYPERBUS_MEM_CFG5_WR_CSH1, and HYPERBUS_MEM_CFG5_WR_CSH1_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg1_get(), hyper_mem_cfg1_set(), HYPERBUS_MEM_CFG1_WR_CSHI0, and HYPERBUS_MEM_CFG1_WR_CSHI0_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg5_get(), hyper_mem_cfg5_set(), HYPERBUS_MEM_CFG5_WR_CSHI1, and HYPERBUS_MEM_CFG5_WR_CSHI1_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg1_get(), hyper_mem_cfg1_set(), HYPERBUS_MEM_CFG1_WR_CSS0, and HYPERBUS_MEM_CFG1_WR_CSS0_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg5_get(), hyper_mem_cfg5_set(), HYPERBUS_MEM_CFG5_WR_CSS1, and HYPERBUS_MEM_CFG5_WR_CSS1_MASK.
Referenced by hyper_timing_set().
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inlinestatic |
References hyper_mem_cfg3_get(), hyper_mem_cfg3_set(), HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0, and HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0_MASK.
Referenced by hyper_max_length_set().
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inlinestatic |
References hyper_mem_cfg2_get(), hyper_mem_cfg2_set(), HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0, and HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0_MASK.
Referenced by hyper_max_length_set().
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inlinestatic |
References hyper_mem_cfg7_get(), hyper_mem_cfg7_set(), HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1, and HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1_MASK.
Referenced by hyper_max_length_set().
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inlinestatic |
References hyper_mem_cfg6_get(), hyper_mem_cfg6_set(), HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1, and HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1_MASK.
Referenced by hyper_max_length_set().
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