hyper_periph.h File Reference

Data Structures
struct	hyperbus_t

Macros
EXT_ADDR
#define	HYPERBUS_EXT_ADDR_EXT_ADDR_MASK
#define	HYPERBUS_EXT_ADDR_EXT_ADDR_SHIFT
#define	HYPERBUS_EXT_ADDR_EXT_ADDR(val)
#define	HYPERBUS_EXT_ADDR_REG_ACCESS_MASK
#define	HYPERBUS_EXT_ADDR_REG_ACCESS_SHIFT
#define	HYPERBUS_EXT_ADDR_REG_ACCESS(val)
MEM_CFG0 - HYPERBUS Memory control Configuration register0
#define	HYPERBUS_MEM_CFG0_MBR0_MASK
#define	HYPERBUS_MEM_CFG0_MBR0_SHIFT
#define	HYPERBUS_MEM_CFG0_MBR0(x)
#define	HYPERBUS_MEM_CFG0_LATENCY0_MASK
#define	HYPERBUS_MEM_CFG0_LATENCY0_SHIFT
#define	HYPERBUS_MEM_CFG0_LATENCY0(x)
#define	HYPERBUS_MEM_CFG0_WRAP_SIZE0_MASK
#define	HYPERBUS_MEM_CFG0_WRAP_SIZE0_SHIFT
#define	HYPERBUS_MEM_CFG0_WRAP_SIZE0(x)
MEM_CFG1 - HYPERBUS Memory control Configuration register1
#define	HYPERBUS_MEM_CFG1_RD_CSHI0_MASK
#define	HYPERBUS_MEM_CFG1_RD_CSHI0_SHIFT
#define	HYPERBUS_MEM_CFG1_RD_CSHI0(x)
#define	HYPERBUS_MEM_CFG1_RD_CSS0_MASK
#define	HYPERBUS_MEM_CFG1_RD_CSS0_SHIFT
#define	HYPERBUS_MEM_CFG1_RD_CSS0(x)
#define	HYPERBUS_MEM_CFG1_RD_CSH0_MASK
#define	HYPERBUS_MEM_CFG1_RD_CSH0_SHIFT
#define	HYPERBUS_MEM_CFG1_RD_CSH0(x)
#define	HYPERBUS_MEM_CFG1_WR_CSHI0_MASK
#define	HYPERBUS_MEM_CFG1_WR_CSHI0_SHIFT
#define	HYPERBUS_MEM_CFG1_WR_CSHI0(x)
#define	HYPERBUS_MEM_CFG1_WR_CSS0_MASK
#define	HYPERBUS_MEM_CFG1_WR_CSS0_SHIFT
#define	HYPERBUS_MEM_CFG1_WR_CSS0(x)
#define	HYPERBUS_MEM_CFG1_WR_CSH0_MASK
#define	HYPERBUS_MEM_CFG1_WR_CSH0_SHIFT
#define	HYPERBUS_MEM_CFG1_WR_CSH0(x)
MEM_CFG2 - HYPERBUS Memory control Configuration register2
#define	HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0_MASK
#define	HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0_SHIFT
#define	HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0(x)
#define	HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0_MASK
#define	HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0_SHIFT
#define	HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0(x)
MEM_CFG3 - HYPERBUS Memory control Configuration register3
#define	HYPERBUS_MEM_CFG3_ACS0_MASK
#define	HYPERBUS_MEM_CFG3_ACS0_SHIFT
#define	HYPERBUS_MEM_CFG3_ACS0(x)
#define	HYPERBUS_MEM_CFG3_TCO0_MASK
#define	HYPERBUS_MEM_CFG3_TCO0_SHIFT
#define	HYPERBUS_MEM_CFG3_TCO0(x)
#define	HYPERBUS_MEM_CFG3_DT0_MASK
#define	HYPERBUS_MEM_CFG3_DT0_SHIFT
#define	HYPERBUS_MEM_CFG3_DT0(x)
#define	HYPERBUS_MEM_CFG3_CRT0_MASK
#define	HYPERBUS_MEM_CFG3_CRT0_SHIFT
#define	HYPERBUS_MEM_CFG3_CRT0(x)
#define	HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0_MASK
#define	HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0_SHIFT
#define	HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0(x)
#define	HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0_MASK
#define	HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0_SHIFT
#define	HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0(x)
#define	HYPERBUS_MEM_CFG3_RDS_DELAY_ADJ_MASK
#define	HYPERBUS_MEM_CFG3_RDS_DELAY_ADJ_SHIFT
#define	HYPERBUS_MEM_CFG3_RDS_DELAY_ADJ(x)
MEM_CFG4 - HYPERBUS Memory control Configuration register4
#define	HYPERBUS_MEM_CFG4_MBR1_MASK
#define	HYPERBUS_MEM_CFG4_MBR1_SHIFT
#define	HYPERBUS_MEM_CFG4_MBR1(x)
#define	HYPERBUS_MEM_CFG4_LATENCY1_MASK
#define	HYPERBUS_MEM_CFG4_LATENCY1_SHIFT
#define	HYPERBUS_MEM_CFG4_LATENCY1(x)
#define	HYPERBUS_MEM_CFG4_WRAP_SIZE1_MASK
#define	HYPERBUS_MEM_CFG4_WRAP_SIZE1_SHIFT
#define	HYPERBUS_MEM_CFG4_WRAP_SIZE1(x)
MEM_CFG5 - HYPERBUS Memory control Configuration register5
#define	HYPERBUS_MEM_CFG5_RD_CSHI1_MASK
#define	HYPERBUS_MEM_CFG5_RD_CSHI1_SHIFT
#define	HYPERBUS_MEM_CFG5_RD_CSHI1(x)
#define	HYPERBUS_MEM_CFG5_RD_CSS1_MASK
#define	HYPERBUS_MEM_CFG5_RD_CSS1_SHIFT
#define	HYPERBUS_MEM_CFG5_RD_CSS1(x)
#define	HYPERBUS_MEM_CFG5_RD_CSH1_MASK
#define	HYPERBUS_MEM_CFG5_RD_CSH1_SHIFT
#define	HYPERBUS_MEM_CFG5_RD_CSH1(x)
#define	HYPERBUS_MEM_CFG5_WR_CSHI1_MASK
#define	HYPERBUS_MEM_CFG5_WR_CSHI1_SHIFT
#define	HYPERBUS_MEM_CFG5_WR_CSHI1(x)
#define	HYPERBUS_MEM_CFG5_WR_CSS1_MASK
#define	HYPERBUS_MEM_CFG5_WR_CSS1_SHIFT
#define	HYPERBUS_MEM_CFG5_WR_CSS1(x)
#define	HYPERBUS_MEM_CFG5_WR_CSH1_MASK
#define	HYPERBUS_MEM_CFG5_WR_CSH1_SHIFT
#define	HYPERBUS_MEM_CFG5_WR_CSH1(x)
MEM_CFG6 - HYPERBUS Memory control Configuration register6
#define	HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1_MASK
#define	HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1_SHIFT
#define	HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1(x)
#define	HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1_MASK
#define	HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1_SHIFT
#define	HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1(x)
MEM_CFG7 - HYPERBUS Memory control Configuration register7
#define	HYPERBUS_MEM_CFG7_ACS1_MASK
#define	HYPERBUS_MEM_CFG7_ACS1_SHIFT
#define	HYPERBUS_MEM_CFG7_ACS1(x)
#define	HYPERBUS_MEM_CFG7_TCO1_MASK
#define	HYPERBUS_MEM_CFG7_TCO1_SHIFT
#define	HYPERBUS_MEM_CFG7_TCO1(x)
#define	HYPERBUS_MEM_CFG7_DT1_MASK
#define	HYPERBUS_MEM_CFG7_DT1_SHIFT
#define	HYPERBUS_MEM_CFG7_DT1(x)
#define	HYPERBUS_MEM_CFG7_CRT1_MASK
#define	HYPERBUS_MEM_CFG7_CRT1_SHIFT
#define	HYPERBUS_MEM_CFG7_CRT1(x)
#define	HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1_MASK
#define	HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1_SHIFT
#define	HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1(x)
#define	HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1_MASK
#define	HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1_SHIFT
#define	HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1(x)

Macro Definition Documentation

#define HYPERBUS_EXT_ADDR_EXT_ADDR

(

val

)

#define HYPERBUS_EXT_ADDR_EXT_ADDR_MASK

#define HYPERBUS_EXT_ADDR_EXT_ADDR_SHIFT

#define HYPERBUS_EXT_ADDR_REG_ACCESS

(

val

)

#define HYPERBUS_EXT_ADDR_REG_ACCESS_MASK

#define HYPERBUS_EXT_ADDR_REG_ACCESS_SHIFT

#define HYPERBUS_MEM_CFG0_LATENCY0

(

x

)

Referenced by hyper_latency0_set().

#define HYPERBUS_MEM_CFG0_LATENCY0_MASK

Referenced by hyper_latency0_set().

#define HYPERBUS_MEM_CFG0_LATENCY0_SHIFT

#define HYPERBUS_MEM_CFG0_MBR0

(

x

)

Referenced by hyper_mbr0_set().

#define HYPERBUS_MEM_CFG0_MBR0_MASK

Referenced by hyper_mbr0_set().

#define HYPERBUS_MEM_CFG0_MBR0_SHIFT

#define HYPERBUS_MEM_CFG0_WRAP_SIZE0

(

x

)

Referenced by hyper_wrap_size0_set().

#define HYPERBUS_MEM_CFG0_WRAP_SIZE0_MASK

Referenced by hyper_wrap_size0_set().

#define HYPERBUS_MEM_CFG0_WRAP_SIZE0_SHIFT

#define HYPERBUS_MEM_CFG1_RD_CSH0

(

x

)

Referenced by hyper_rd_csh0_set().

#define HYPERBUS_MEM_CFG1_RD_CSH0_MASK

Referenced by hyper_rd_csh0_set().

#define HYPERBUS_MEM_CFG1_RD_CSH0_SHIFT

#define HYPERBUS_MEM_CFG1_RD_CSHI0

(

x

)

Referenced by hyper_rd_cshi0_set().

#define HYPERBUS_MEM_CFG1_RD_CSHI0_MASK

Referenced by hyper_rd_cshi0_set().

#define HYPERBUS_MEM_CFG1_RD_CSHI0_SHIFT

#define HYPERBUS_MEM_CFG1_RD_CSS0

(

x

)

Referenced by hyper_rd_css0_set().

#define HYPERBUS_MEM_CFG1_RD_CSS0_MASK

Referenced by hyper_rd_css0_set().

#define HYPERBUS_MEM_CFG1_RD_CSS0_SHIFT

#define HYPERBUS_MEM_CFG1_WR_CSH0

(

x

)

Referenced by hyper_wr_csh0_set().

#define HYPERBUS_MEM_CFG1_WR_CSH0_MASK

Referenced by hyper_wr_csh0_set().

#define HYPERBUS_MEM_CFG1_WR_CSH0_SHIFT

#define HYPERBUS_MEM_CFG1_WR_CSHI0

(

x

)

Referenced by hyper_wr_cshi0_set().

#define HYPERBUS_MEM_CFG1_WR_CSHI0_MASK

Referenced by hyper_wr_cshi0_set().

#define HYPERBUS_MEM_CFG1_WR_CSHI0_SHIFT

#define HYPERBUS_MEM_CFG1_WR_CSS0

(

x

)

Referenced by hyper_wr_css0_set().

#define HYPERBUS_MEM_CFG1_WR_CSS0_MASK

Referenced by hyper_wr_css0_set().

#define HYPERBUS_MEM_CFG1_WR_CSS0_SHIFT

#define HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0

(

x

)

Referenced by hyper_rd_max_length0_set().

#define HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0_MASK

Referenced by hyper_rd_max_length0_set().

#define HYPERBUS_MEM_CFG2_RD_MAX_LENGTH0_SHIFT

#define HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0

(

x

)

Referenced by hyper_wr_max_length0_set().

#define HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0_MASK

Referenced by hyper_wr_max_length0_set().

#define HYPERBUS_MEM_CFG2_WR_MAX_LENGTH0_SHIFT

#define HYPERBUS_MEM_CFG3_ACS0

(

x

)

Referenced by hyper_acs0_set().

#define HYPERBUS_MEM_CFG3_ACS0_MASK

Referenced by hyper_acs0_set().

#define HYPERBUS_MEM_CFG3_ACS0_SHIFT

#define HYPERBUS_MEM_CFG3_CRT0

(

x

)

Referenced by hyper_crt0_set().

#define HYPERBUS_MEM_CFG3_CRT0_MASK

Referenced by hyper_crt0_set().

#define HYPERBUS_MEM_CFG3_CRT0_SHIFT

#define HYPERBUS_MEM_CFG3_DT0

(

x

)

Referenced by hyper_dt0_set().

#define HYPERBUS_MEM_CFG3_DT0_MASK

Referenced by hyper_dt0_set().

#define HYPERBUS_MEM_CFG3_DT0_SHIFT

#define HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0

(

x

)

Referenced by hyper_rd_max_length0_en_set().

#define HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0_MASK

Referenced by hyper_rd_max_length0_en_set().

#define HYPERBUS_MEM_CFG3_RD_MAX_LEN_EN0_SHIFT

#define HYPERBUS_MEM_CFG3_RDS_DELAY_ADJ

(

x

)

Referenced by hyper_rds_delay_adj_set().

#define HYPERBUS_MEM_CFG3_RDS_DELAY_ADJ_MASK

Referenced by hyper_rds_delay_adj_set().

#define HYPERBUS_MEM_CFG3_RDS_DELAY_ADJ_SHIFT

#define HYPERBUS_MEM_CFG3_TCO0

(

x

)

Referenced by hyper_tco0_set().

#define HYPERBUS_MEM_CFG3_TCO0_MASK

Referenced by hyper_tco0_set().

#define HYPERBUS_MEM_CFG3_TCO0_SHIFT

#define HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0

(

x

)

Referenced by hyper_wr_max_length0_en_set().

#define HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0_MASK

Referenced by hyper_wr_max_length0_en_set().

#define HYPERBUS_MEM_CFG3_WR_MAX_LEN_EN0_SHIFT

#define HYPERBUS_MEM_CFG4_LATENCY1

(

x

)

Referenced by hyper_latency1_set().

#define HYPERBUS_MEM_CFG4_LATENCY1_MASK

Referenced by hyper_latency1_set().

#define HYPERBUS_MEM_CFG4_LATENCY1_SHIFT

#define HYPERBUS_MEM_CFG4_MBR1

(

x

)

Referenced by hyper_mbr1_set().

#define HYPERBUS_MEM_CFG4_MBR1_MASK

Referenced by hyper_mbr1_set().

#define HYPERBUS_MEM_CFG4_MBR1_SHIFT

#define HYPERBUS_MEM_CFG4_WRAP_SIZE1

(

x

)

Referenced by hyper_wrap_size1_set().

#define HYPERBUS_MEM_CFG4_WRAP_SIZE1_MASK

Referenced by hyper_wrap_size1_set().

#define HYPERBUS_MEM_CFG4_WRAP_SIZE1_SHIFT

#define HYPERBUS_MEM_CFG5_RD_CSH1

(

x

)

Referenced by hyper_rd_csh1_set().

#define HYPERBUS_MEM_CFG5_RD_CSH1_MASK

Referenced by hyper_rd_csh1_set().

#define HYPERBUS_MEM_CFG5_RD_CSH1_SHIFT

#define HYPERBUS_MEM_CFG5_RD_CSHI1

(

x

)

Referenced by hyper_rd_cshi1_set().

#define HYPERBUS_MEM_CFG5_RD_CSHI1_MASK

Referenced by hyper_rd_cshi1_set().

#define HYPERBUS_MEM_CFG5_RD_CSHI1_SHIFT

#define HYPERBUS_MEM_CFG5_RD_CSS1

(

x

)

Referenced by hyper_rd_css1_set().

#define HYPERBUS_MEM_CFG5_RD_CSS1_MASK

Referenced by hyper_rd_css1_set().

#define HYPERBUS_MEM_CFG5_RD_CSS1_SHIFT

#define HYPERBUS_MEM_CFG5_WR_CSH1

(

x

)

Referenced by hyper_wr_csh1_set().

#define HYPERBUS_MEM_CFG5_WR_CSH1_MASK

Referenced by hyper_wr_csh1_set().

#define HYPERBUS_MEM_CFG5_WR_CSH1_SHIFT

#define HYPERBUS_MEM_CFG5_WR_CSHI1

(

x

)

Referenced by hyper_wr_cshi1_set().

#define HYPERBUS_MEM_CFG5_WR_CSHI1_MASK

Referenced by hyper_wr_cshi1_set().

#define HYPERBUS_MEM_CFG5_WR_CSHI1_SHIFT

#define HYPERBUS_MEM_CFG5_WR_CSS1

(

x

)

Referenced by hyper_wr_css1_set().

#define HYPERBUS_MEM_CFG5_WR_CSS1_MASK

Referenced by hyper_wr_css1_set().

#define HYPERBUS_MEM_CFG5_WR_CSS1_SHIFT

#define HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1

(

x

)

Referenced by hyper_rd_max_length1_set().

#define HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1_MASK

Referenced by hyper_rd_max_length1_set().

#define HYPERBUS_MEM_CFG6_RD_MAX_LENGTH1_SHIFT

#define HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1

(

x

)

Referenced by hyper_wr_max_length1_set().

#define HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1_MASK

Referenced by hyper_wr_max_length1_set().

#define HYPERBUS_MEM_CFG6_WR_MAX_LENGTH1_SHIFT

#define HYPERBUS_MEM_CFG7_ACS1

(

x

)

Referenced by hyper_acs1_set().

#define HYPERBUS_MEM_CFG7_ACS1_MASK

Referenced by hyper_acs1_set().

#define HYPERBUS_MEM_CFG7_ACS1_SHIFT

#define HYPERBUS_MEM_CFG7_CRT1

(

x

)

Referenced by hyper_crt1_set().

#define HYPERBUS_MEM_CFG7_CRT1_MASK

Referenced by hyper_crt1_set().

#define HYPERBUS_MEM_CFG7_CRT1_SHIFT

#define HYPERBUS_MEM_CFG7_DT1

(

x

)

Referenced by hyper_dt1_set().

#define HYPERBUS_MEM_CFG7_DT1_MASK

Referenced by hyper_dt1_set().

#define HYPERBUS_MEM_CFG7_DT1_SHIFT

#define HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1

(

x

)

Referenced by hyper_rd_max_length1_en_set().

#define HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1_MASK

Referenced by hyper_rd_max_length1_en_set().

#define HYPERBUS_MEM_CFG7_RD_MAX_LEN_EN1_SHIFT

#define HYPERBUS_MEM_CFG7_TCO1

(

x

)

Referenced by hyper_tco1_set().

#define HYPERBUS_MEM_CFG7_TCO1_MASK

Referenced by hyper_tco1_set().

#define HYPERBUS_MEM_CFG7_TCO1_SHIFT

#define HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1

(

x

)

Referenced by hyper_wr_max_length1_en_set().

#define HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1_MASK

Referenced by hyper_wr_max_length1_en_set().

#define HYPERBUS_MEM_CFG7_WR_MAX_LEN_EN1_SHIFT