FreeRTOS port on GAP8/RISC-V
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gap9/pmsis/include/pmsis/targets/periph/soc_ctrl_periph.h File Reference

Data Structures

struct  soc_ctrl
 
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Macros

INFO
#define SOC_CTRL_INFO_NB_CL_MASK
 
#define SOC_CTRL_INFO_NB_CL_SHIFT
 
#define SOC_CTRL_INFO_NB_CL(val)
 
#define SOC_CTRL_INFO_NB_CORES_MASK
 
#define SOC_CTRL_INFO_NB_CORES_SHIFT
 
#define SOC_CTRL_INFO_NB_CORES(val)
 
FC_BOOT
#define SOC_CTRL_FC_BOOT_ADDR_MASK
 
#define SOC_CTRL_FC_BOOT_ADDR_SHIFT
 
#define SOC_CTRL_FC_BOOT_ADDR(val)
 
FC_FETCH
#define SOC_CTRL_FC_FETCH_FC_FE_MASK
 
#define SOC_CTRL_FC_FETCH_FC_FE_SHIFT
 
#define SOC_CTRL_FC_FETCH_FC_FE(val)
 
CL_ISOLATE
#define SOC_CTRL_CL_ISOLATE_EN_MASK
 
#define SOC_CTRL_CL_ISOLATE_EN_SHIFT
 
#define SOC_CTRL_CL_ISOLATE_EN(val)
 
CL_BUSY
#define SOC_CTRL_CL_BUSY_BUSY_MASK
 
#define SOC_CTRL_CL_BUSY_BUSY_SHIFT
 
#define SOC_CTRL_CL_BUSY_BUSY(val)
 
JTAGREG
#define SOC_CTRL_JTAGREG_INT_SYNC_MASK
 
#define SOC_CTRL_JTAGREG_INT_SYNC_SHIFT
 
#define SOC_CTRL_JTAGREG_INT_SYNC(val)
 
#define READ_SOC_CTRL_JTAGREG_INT_SYNC(val)
 
#define SOC_CTRL_JTAGREG_INT_BT_MD_MASK
 
#define SOC_CTRL_JTAGREG_INT_BT_MD_SHIFT
 
#define SOC_CTRL_JTAGREG_INT_BT_MD(val)
 
#define READ_SOC_CTRL_JTAGREG_INT_BT_MD(val)
 
#define SOC_CTRL_JTAGREG_EXT_SYNC_MASK
 
#define SOC_CTRL_JTAGREG_EXT_SYNC_SHIFT
 
#define SOC_CTRL_JTAGREG_EXT_SYNC(val)
 
#define READ_SOC_CTRL_JTAGREG_EXT_SYNC(val)
 
#define SOC_CTRL_JTAGREG_EXT_BT_MD_MASK
 
#define SOC_CTRL_JTAGREG_EXT_BT_MD_SHIFT
 
#define SOC_CTRL_JTAGREG_EXT_BT_MD(val)
 
#define READ_SOC_CTRL_JTAGREG_EXT_BT_MD(val)
 
SLEEP_CTRL
#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_MASK
 
#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_SHIFT
 
#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL(val)
 
CORESTATUS
#define SOC_CTRL_CORESTATUS_STATUS_MASK
 
#define SOC_CTRL_CORESTATUS_STATUS_SHIFT
 
#define SOC_CTRL_CORESTATUS_STATUS(val)
 
CORESTATUS_RO
#define SOC_CTRL_CORESTATUS_RO_STATUS_MASK
 
#define SOC_CTRL_CORESTATUS_RO_STATUS_SHIFT
 
#define SOC_CTRL_CORESTATUS_RO_STATUS(val)
 
CLK_SEL
#define SOC_CTRL_CLK_SEL_CLK_SOC_MASK
 
#define SOC_CTRL_CLK_SEL_CLK_SOC_SHIFT
 
#define SOC_CTRL_CLK_SEL_CLK_SOC(val)
 
#define SOC_CTRL_CLK_SEL_CLK_CLUSTER_MASK
 
#define SOC_CTRL_CLK_SEL_CLK_CLUSTER_SHIFT
 
#define SOC_CTRL_CLK_SEL_CLK_CLUSTER(val)
 
SAFE_PMU_SLEEPCTRL
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_REBOOT_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_REBOOT_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_REBOOT(val)
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SMARTWAKE_EN_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SMARTWAKE_EN_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SMARTWAKE_EN(val)
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RTCWAKE_EN_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RTCWAKE_EN_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RTCWAKE_EN(val)
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE(val)
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN(val)
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_MRAM_WAKESTATE_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_MRAM_WAKESTATE_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_MRAM_WAKESTATE(val)
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CLUSTER_WAKESTATE_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CLUSTER_WAKESTATE_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CLUSTER_WAKESTATE(val)
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RET_MEM_MASK
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RET_MEM_SHIFT
 
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RET_MEM(val)
 
SAFE_PADSLEEP
#define SOC_CTRL_SAFE_PADSLEEP_EN_MASK
 
#define SOC_CTRL_SAFE_PADSLEEP_EN_SHIFT
 
#define SOC_CTRL_SAFE_PADSLEEP_EN(val)
 

Functions

struct soc_ctrl __attribute__ ((packed)) soc_ctrl_t
 

Variables

volatile uint32_t info
 
volatile uint32_t fc_boot
 
volatile uint32_t fc_fetch
 
volatile uint32_t cl_isolate
 
volatile uint32_t padfun [4]
 
volatile uint32_t padcfg [16]
 
volatile uint32_t unallocate0 [3]
 
volatile uint32_t cl_busy
 
volatile uint32_t unallocate1 [1]
 
volatile uint32_t jtagreg
 
volatile uint32_t unallocate2
 
volatile uint32_t sleep_ctrl
 
volatile uint32_t clk_div_i3c
 
volatile uint32_t unallocate3 [7]
 
volatile uint32_t corestatus
 
volatile uint32_t unallocate4 [7]
 
volatile uint32_t corestatus_ro
 
volatile uint32_t bootsel
 
volatile uint32_t wd_clr
 
volatile uint32_t unallocate5
 
volatile uint32_t clk_sel
 
volatile uint32_t clk_div_soc
 
volatile uint32_t clk_div_clu
 
volatile uint32_t clk_div_per
 
volatile uint32_t supervisor_dbg
 
volatile uint32_t rwm_grp [7]
 
volatile uint32_t unallocate6
 
volatile uint32_t safe_pmu_sleepctrl
 
volatile uint32_t safe_wd
 
volatile uint32_t safe_sleeppadcfg [4]
 
volatile uint32_t safe_padsleep
 
volatile uint32_t safe_nevacf
 
volatile uint32_t safe_gpreg
 
volatile uint32_t reg_gpio_iso
 
volatile uint32_t reg_cam_iso
 
volatile uint32_t reg_lvds_iso
 
soc_ctrl_info_t
typedef __attribute__
 

Macro Definition Documentation

#define READ_SOC_CTRL_JTAGREG_EXT_BT_MD (   val)
#define READ_SOC_CTRL_JTAGREG_EXT_SYNC (   val)
#define READ_SOC_CTRL_JTAGREG_INT_BT_MD (   val)
#define READ_SOC_CTRL_JTAGREG_INT_SYNC (   val)
#define SOC_CTRL_CL_BUSY_BUSY (   val)
#define SOC_CTRL_CL_BUSY_BUSY_MASK
#define SOC_CTRL_CL_BUSY_BUSY_SHIFT
#define SOC_CTRL_CL_ISOLATE_EN (   val)
#define SOC_CTRL_CL_ISOLATE_EN_MASK
#define SOC_CTRL_CL_ISOLATE_EN_SHIFT
#define SOC_CTRL_CLK_SEL_CLK_CLUSTER (   val)
#define SOC_CTRL_CLK_SEL_CLK_CLUSTER_MASK
#define SOC_CTRL_CLK_SEL_CLK_CLUSTER_SHIFT
#define SOC_CTRL_CLK_SEL_CLK_SOC (   val)
#define SOC_CTRL_CLK_SEL_CLK_SOC_MASK
#define SOC_CTRL_CLK_SEL_CLK_SOC_SHIFT
#define SOC_CTRL_CORESTATUS_RO_STATUS (   val)
#define SOC_CTRL_CORESTATUS_RO_STATUS_MASK
#define SOC_CTRL_CORESTATUS_RO_STATUS_SHIFT
#define SOC_CTRL_CORESTATUS_STATUS (   val)
#define SOC_CTRL_CORESTATUS_STATUS_MASK
#define SOC_CTRL_CORESTATUS_STATUS_SHIFT
#define SOC_CTRL_FC_BOOT_ADDR (   val)
#define SOC_CTRL_FC_BOOT_ADDR_MASK
#define SOC_CTRL_FC_BOOT_ADDR_SHIFT
#define SOC_CTRL_FC_FETCH_FC_FE (   val)
#define SOC_CTRL_FC_FETCH_FC_FE_MASK
#define SOC_CTRL_FC_FETCH_FC_FE_SHIFT
#define SOC_CTRL_INFO_NB_CL (   val)
#define SOC_CTRL_INFO_NB_CL_MASK
#define SOC_CTRL_INFO_NB_CL_SHIFT
#define SOC_CTRL_INFO_NB_CORES (   val)
#define SOC_CTRL_INFO_NB_CORES_MASK
#define SOC_CTRL_INFO_NB_CORES_SHIFT
#define SOC_CTRL_JTAGREG_EXT_BT_MD (   val)
#define SOC_CTRL_JTAGREG_EXT_BT_MD_MASK
#define SOC_CTRL_JTAGREG_EXT_BT_MD_SHIFT
#define SOC_CTRL_JTAGREG_EXT_SYNC (   val)
#define SOC_CTRL_JTAGREG_EXT_SYNC_MASK
#define SOC_CTRL_JTAGREG_EXT_SYNC_SHIFT
#define SOC_CTRL_JTAGREG_INT_BT_MD (   val)
#define SOC_CTRL_JTAGREG_INT_BT_MD_MASK
#define SOC_CTRL_JTAGREG_INT_BT_MD_SHIFT
#define SOC_CTRL_JTAGREG_INT_SYNC (   val)
#define SOC_CTRL_JTAGREG_INT_SYNC_MASK
#define SOC_CTRL_JTAGREG_INT_SYNC_SHIFT
#define SOC_CTRL_SAFE_PADSLEEP_EN (   val)
#define SOC_CTRL_SAFE_PADSLEEP_EN_MASK
#define SOC_CTRL_SAFE_PADSLEEP_EN_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CLUSTER_WAKESTATE (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CLUSTER_WAKESTATE_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_CLUSTER_WAKESTATE_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_EN_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_EXTWAKE_TYPE_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_MRAM_WAKESTATE (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_MRAM_WAKESTATE_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_MRAM_WAKESTATE_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_REBOOT (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_REBOOT_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_REBOOT_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RET_MEM (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RET_MEM_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RET_MEM_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RTCWAKE_EN (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RTCWAKE_EN_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_RTCWAKE_EN_SHIFT
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SMARTWAKE_EN (   val)
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SMARTWAKE_EN_MASK
#define SOC_CTRL_SAFE_PMU_SLEEPCTRL_SMARTWAKE_EN_SHIFT
#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL (   val)
#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_MASK
#define SOC_CTRL_SLEEP_CTRL_SLEEP_CTRL_SHIFT

Function Documentation

struct soc_ctrl __attribute__ ( (packed)  )

SOC_CTRL_Type Register Layout Typedef

Variable Documentation

typedef __attribute__
volatile uint32_t bootsel

Value of pad bootsel

volatile uint32_t cl_busy

Cluster busy register

volatile uint32_t cl_isolate

Isolate cluster register

volatile uint32_t clk_div_clu

Cluster Clock Divider settings

volatile uint32_t clk_div_i3c

Clock divider for I3C

volatile uint32_t clk_div_per

Peripheral Clock Divider Settings

volatile uint32_t clk_div_soc

SOC Clock Divider settings

volatile uint32_t clk_sel

Clock selection for SOC,Cluster and Periph

volatile uint32_t corestatus

EOC and chip status register

volatile uint32_t corestatus_ro

EOC and chip status register read mirror

volatile uint32_t fc_boot

Boot address

volatile uint32_t fc_fetch

FC Fetch enable

volatile uint32_t info

Core information register

volatile uint32_t jtagreg

JTAG external register

volatile uint32_t padcfg[16]

Function register (pad 0 to 3)

Referenced by gpio_padcfg_get(), and gpio_padcfg_set().

volatile uint32_t padfun[4]

Mux config register (pad 0-15)

volatile uint32_t reg_cam_iso

CAM power domain pad input isolation register

volatile uint32_t reg_gpio_iso

GPIO power domain pad input isolation register

volatile uint32_t reg_lvds_iso

LVDS power domain pad input isolation register

volatile uint32_t rwm_grp[7]

nan

volatile uint32_t safe_gpreg

General purpouse register AO

volatile uint32_t safe_nevacf

Config timings for NEVA

volatile uint32_t safe_padsleep

Enable Sleep mode for pads

volatile uint32_t safe_pmu_sleepctrl

Sleep modes configuration register

volatile uint32_t safe_sleeppadcfg[4]

Sleep config register (pad 0-15) (pad 16-31) (pad 32-47) (pad 48-63)

volatile uint32_t safe_wd

Enables and configures WatchDog Timer

volatile uint32_t sleep_ctrl

Alias for SAFE_PMU_SLEEPCTRL

volatile uint32_t supervisor_dbg

nan

volatile uint32_t unallocate0[3]
volatile uint32_t unallocate1[1]
volatile uint32_t unallocate2

Function register (pad 0 to 3)

volatile uint32_t unallocate3[7]
volatile uint32_t unallocate4[7]
volatile uint32_t unallocate5
volatile uint32_t unallocate6
volatile uint32_t wd_clr

Clear WD timer