pcm_sink_evk_audioaddon_48kHz
This component implements a pcm sink, to be used with the GAP9 EVK with the Audio Add-On board.
The sink will be configured to run stereo, 48kHz with a fixed blocksize of 256 samples.
Interface
- Input Buffer:
Only 2 channels at 48kHz with blocksize of 256 samples pr channel is supported.
- Parameters:
None
Implementations
Implementations are available on FC only. Model implementation is included, but has no functionality as a HW sink is useless in a model context.
Tests
Model nonreg.sh test is not used, as model is not implemented. It will run, but won’t test anything.
gap9_fc implementation contain two tests, EVK and GVSOC
Tests will generate a stereo sine signal (440Hz and 660Hz) and play it back. EVK test is considered succesfull if the graph can execute without error. The gvsoc test will compare output to input, these must be identical for test to pass.
Both tests can be run using gaptest
. Simply type gaptest
in the component root folder to execute the testrunner.
The default SDK config is to run the gvsoc test. It can also be triggered manually by running nonreg.py
in the test/
folder.
Setting EVK tests as default tests:
To set the EVK test as the SDK default test, modify src/sdk.config
as follows:
Comment out the lines:
CONFIG_PLATFORM_GVSOC=y
CONFIG_GVSOC_PROXY_MODE=y
CONFIG_GVSOC_PROXY_MODE_PORT=30000
And add this instead:
CONFIG_PLATFORM_BOARD=y
NB: Nonreg.py will still try to verify an output file, even when running on board. So as of now, the script will throw an error, but the program will still execute on board as intended
HW Requirements
You will need the following HW to use the component on the EVK
GAP9Mod v1.0b
GAP9EVK v1.3
Audio addon v2.1
Speaker with jack connectivity
Furthermore, the EVK needs to be configured to run in PCM mode by setting the board jumpers as follows
P4 and P9 needs to be closed to output Left channel on the jack connector.
P10 and P11 needs to be closed to output Right channel on the jack connector.
P3 needs to be set on VROOT.
P5 needs to be set on LDO.
P6 needs to be set on LDO.
Finally, configure Audio Addon SSM6515 DAC in PCM mode:
W2: Opened
W3: Opened
W5: Opened
W12: Opened
W13: Opened
W15: Opened
W1: Closed - SSM6515 left data wired to SAI2_SDO
W4: Closed - SSM6515 right data wired to SAI2_SDO
W6: Closed - SSM6515 right data wired to SAI2_SDO
W7: Closed - SSM6515 left data wired to SAI2_SDO
W8: Closed - SSM6515 right clock wired to SAI2_Sck (with SSM6515 left clock)