udma_uart_regfields.h File Reference

Macros
#define	UDMA_UART_RX_DEST_RX_DEST_BIT
#define	UDMA_UART_RX_DEST_RX_DEST_WIDTH
#define	UDMA_UART_RX_DEST_RX_DEST_MASK
#define	UDMA_UART_RX_DEST_RX_DEST_RESET
#define	UDMA_UART_TX_DEST_TX_DEST_BIT
#define	UDMA_UART_TX_DEST_TX_DEST_WIDTH
#define	UDMA_UART_TX_DEST_TX_DEST_MASK
#define	UDMA_UART_TX_DEST_TX_DEST_RESET
#define	UDMA_UART_STATUS_TX_BUSY_BIT
#define	UDMA_UART_STATUS_TX_BUSY_WIDTH
#define	UDMA_UART_STATUS_TX_BUSY_MASK
#define	UDMA_UART_STATUS_TX_BUSY_RESET
#define	UDMA_UART_STATUS_RX_BUSY_BIT
#define	UDMA_UART_STATUS_RX_BUSY_WIDTH
#define	UDMA_UART_STATUS_RX_BUSY_MASK
#define	UDMA_UART_STATUS_RX_BUSY_RESET
#define	UDMA_UART_SETUP_PARITY_ENA_BIT
#define	UDMA_UART_SETUP_PARITY_ENA_WIDTH
#define	UDMA_UART_SETUP_PARITY_ENA_MASK
#define	UDMA_UART_SETUP_PARITY_ENA_RESET
#define	UDMA_UART_SETUP_BIT_LENGTH_BIT
#define	UDMA_UART_SETUP_BIT_LENGTH_WIDTH
#define	UDMA_UART_SETUP_BIT_LENGTH_MASK
#define	UDMA_UART_SETUP_BIT_LENGTH_RESET
#define	UDMA_UART_SETUP_STOP_BITS_BIT
#define	UDMA_UART_SETUP_STOP_BITS_WIDTH
#define	UDMA_UART_SETUP_STOP_BITS_MASK
#define	UDMA_UART_SETUP_STOP_BITS_RESET
#define	UDMA_UART_SETUP_TX_ENA_BIT
#define	UDMA_UART_SETUP_TX_ENA_WIDTH
#define	UDMA_UART_SETUP_TX_ENA_MASK
#define	UDMA_UART_SETUP_TX_ENA_RESET
#define	UDMA_UART_SETUP_RX_ENA_BIT
#define	UDMA_UART_SETUP_RX_ENA_WIDTH
#define	UDMA_UART_SETUP_RX_ENA_MASK
#define	UDMA_UART_SETUP_RX_ENA_RESET
#define	UDMA_UART_SETUP_CTS_EN_BIT
#define	UDMA_UART_SETUP_CTS_EN_WIDTH
#define	UDMA_UART_SETUP_CTS_EN_MASK
#define	UDMA_UART_SETUP_CTS_EN_RESET
#define	UDMA_UART_SETUP_RTS_EN_BIT
#define	UDMA_UART_SETUP_RTS_EN_WIDTH
#define	UDMA_UART_SETUP_RTS_EN_MASK
#define	UDMA_UART_SETUP_RTS_EN_RESET
#define	UDMA_UART_SETUP_TX_CLK_EN_BIT
#define	UDMA_UART_SETUP_TX_CLK_EN_WIDTH
#define	UDMA_UART_SETUP_TX_CLK_EN_MASK
#define	UDMA_UART_SETUP_TX_CLK_EN_RESET
#define	UDMA_UART_SETUP_TX_CLK_POL_BIT
#define	UDMA_UART_SETUP_TX_CLK_POL_WIDTH
#define	UDMA_UART_SETUP_TX_CLK_POL_MASK
#define	UDMA_UART_SETUP_TX_CLK_POL_RESET
#define	UDMA_UART_SETUP_TX_CLK_PHA_BIT
#define	UDMA_UART_SETUP_TX_CLK_PHA_WIDTH
#define	UDMA_UART_SETUP_TX_CLK_PHA_MASK
#define	UDMA_UART_SETUP_TX_CLK_PHA_RESET
#define	UDMA_UART_SETUP_CLKDIV_BIT
#define	UDMA_UART_SETUP_CLKDIV_WIDTH
#define	UDMA_UART_SETUP_CLKDIV_MASK
#define	UDMA_UART_SETUP_CLKDIV_RESET
#define	UDMA_UART_ERROR_ERR_OVERFLOW_BIT
#define	UDMA_UART_ERROR_ERR_OVERFLOW_WIDTH
#define	UDMA_UART_ERROR_ERR_OVERFLOW_MASK
#define	UDMA_UART_ERROR_ERR_OVERFLOW_RESET
#define	UDMA_UART_ERROR_ERR_PARITY_BIT
#define	UDMA_UART_ERROR_ERR_PARITY_WIDTH
#define	UDMA_UART_ERROR_ERR_PARITY_MASK
#define	UDMA_UART_ERROR_ERR_PARITY_RESET
#define	UDMA_UART_IRQ_EN_RX_IRQ_BIT
#define	UDMA_UART_IRQ_EN_RX_IRQ_WIDTH
#define	UDMA_UART_IRQ_EN_RX_IRQ_MASK
#define	UDMA_UART_IRQ_EN_RX_IRQ_RESET
#define	UDMA_UART_IRQ_EN_ERR_IRQ_BIT
#define	UDMA_UART_IRQ_EN_ERR_IRQ_WIDTH
#define	UDMA_UART_IRQ_EN_ERR_IRQ_MASK
#define	UDMA_UART_IRQ_EN_ERR_IRQ_RESET
#define	UDMA_UART_IRQ_EN_TX_IRQ_BIT
#define	UDMA_UART_IRQ_EN_TX_IRQ_WIDTH
#define	UDMA_UART_IRQ_EN_TX_IRQ_MASK
#define	UDMA_UART_IRQ_EN_TX_IRQ_RESET
#define	UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_BIT
#define	UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_WIDTH
#define	UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_MASK
#define	UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_RESET

Macro Definition Documentation

#define UDMA_UART_ERROR_ERR_OVERFLOW_BIT

#define UDMA_UART_ERROR_ERR_OVERFLOW_MASK

#define UDMA_UART_ERROR_ERR_OVERFLOW_RESET

#define UDMA_UART_ERROR_ERR_OVERFLOW_WIDTH

#define UDMA_UART_ERROR_ERR_PARITY_BIT

#define UDMA_UART_ERROR_ERR_PARITY_MASK

#define UDMA_UART_ERROR_ERR_PARITY_RESET

#define UDMA_UART_ERROR_ERR_PARITY_WIDTH

#define UDMA_UART_IRQ_EN_ERR_IRQ_BIT

#define UDMA_UART_IRQ_EN_ERR_IRQ_MASK

#define UDMA_UART_IRQ_EN_ERR_IRQ_RESET

#define UDMA_UART_IRQ_EN_ERR_IRQ_WIDTH

#define UDMA_UART_IRQ_EN_RX_IRQ_BIT

#define UDMA_UART_IRQ_EN_RX_IRQ_MASK

#define UDMA_UART_IRQ_EN_RX_IRQ_RESET

#define UDMA_UART_IRQ_EN_RX_IRQ_WIDTH

#define UDMA_UART_IRQ_EN_TX_IRQ_BIT

#define UDMA_UART_IRQ_EN_TX_IRQ_MASK

#define UDMA_UART_IRQ_EN_TX_IRQ_RESET

#define UDMA_UART_IRQ_EN_TX_IRQ_WIDTH

#define UDMA_UART_RX_DEST_RX_DEST_BIT

#define UDMA_UART_RX_DEST_RX_DEST_MASK

#define UDMA_UART_RX_DEST_RX_DEST_RESET

#define UDMA_UART_RX_DEST_RX_DEST_WIDTH

#define UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_BIT

#define UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_MASK

#define UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_RESET

#define UDMA_UART_SETUP_2_RTS_HIGH_LIMIT_WIDTH

#define UDMA_UART_SETUP_BIT_LENGTH_BIT

#define UDMA_UART_SETUP_BIT_LENGTH_MASK

#define UDMA_UART_SETUP_BIT_LENGTH_RESET

#define UDMA_UART_SETUP_BIT_LENGTH_WIDTH

#define UDMA_UART_SETUP_CLKDIV_BIT

#define UDMA_UART_SETUP_CLKDIV_MASK

#define UDMA_UART_SETUP_CLKDIV_RESET

#define UDMA_UART_SETUP_CLKDIV_WIDTH

#define UDMA_UART_SETUP_CTS_EN_BIT

#define UDMA_UART_SETUP_CTS_EN_MASK

#define UDMA_UART_SETUP_CTS_EN_RESET

#define UDMA_UART_SETUP_CTS_EN_WIDTH

#define UDMA_UART_SETUP_PARITY_ENA_BIT

#define UDMA_UART_SETUP_PARITY_ENA_MASK

#define UDMA_UART_SETUP_PARITY_ENA_RESET

#define UDMA_UART_SETUP_PARITY_ENA_WIDTH

#define UDMA_UART_SETUP_RTS_EN_BIT

#define UDMA_UART_SETUP_RTS_EN_MASK

#define UDMA_UART_SETUP_RTS_EN_RESET

#define UDMA_UART_SETUP_RTS_EN_WIDTH

#define UDMA_UART_SETUP_RX_ENA_BIT

#define UDMA_UART_SETUP_RX_ENA_MASK

#define UDMA_UART_SETUP_RX_ENA_RESET

#define UDMA_UART_SETUP_RX_ENA_WIDTH

#define UDMA_UART_SETUP_STOP_BITS_BIT

#define UDMA_UART_SETUP_STOP_BITS_MASK

#define UDMA_UART_SETUP_STOP_BITS_RESET

#define UDMA_UART_SETUP_STOP_BITS_WIDTH

#define UDMA_UART_SETUP_TX_CLK_EN_BIT

#define UDMA_UART_SETUP_TX_CLK_EN_MASK

#define UDMA_UART_SETUP_TX_CLK_EN_RESET

#define UDMA_UART_SETUP_TX_CLK_EN_WIDTH

#define UDMA_UART_SETUP_TX_CLK_PHA_BIT

#define UDMA_UART_SETUP_TX_CLK_PHA_MASK

#define UDMA_UART_SETUP_TX_CLK_PHA_RESET

#define UDMA_UART_SETUP_TX_CLK_PHA_WIDTH

#define UDMA_UART_SETUP_TX_CLK_POL_BIT

#define UDMA_UART_SETUP_TX_CLK_POL_MASK

#define UDMA_UART_SETUP_TX_CLK_POL_RESET

#define UDMA_UART_SETUP_TX_CLK_POL_WIDTH

#define UDMA_UART_SETUP_TX_ENA_BIT

#define UDMA_UART_SETUP_TX_ENA_MASK

#define UDMA_UART_SETUP_TX_ENA_RESET

#define UDMA_UART_SETUP_TX_ENA_WIDTH

#define UDMA_UART_STATUS_RX_BUSY_BIT

Referenced by hal_udma_uart_rx_status_get().

#define UDMA_UART_STATUS_RX_BUSY_MASK

Referenced by hal_udma_uart_rx_status_get().

#define UDMA_UART_STATUS_RX_BUSY_RESET

#define UDMA_UART_STATUS_RX_BUSY_WIDTH

#define UDMA_UART_STATUS_TX_BUSY_BIT

#define UDMA_UART_STATUS_TX_BUSY_MASK

Referenced by hal_udma_uart_tx_status_get().

#define UDMA_UART_STATUS_TX_BUSY_RESET

#define UDMA_UART_STATUS_TX_BUSY_WIDTH

#define UDMA_UART_TX_DEST_TX_DEST_BIT

#define UDMA_UART_TX_DEST_TX_DEST_MASK

#define UDMA_UART_TX_DEST_TX_DEST_RESET

#define UDMA_UART_TX_DEST_TX_DEST_WIDTH