udma_mram_regfields.h File Reference

Macros
#define	UDMA_MRAM_RX_DEST_DEST_BIT
#define	UDMA_MRAM_RX_DEST_DEST_WIDTH
#define	UDMA_MRAM_RX_DEST_DEST_MASK
#define	UDMA_MRAM_RX_DEST_DEST_RESET
#define	UDMA_MRAM_TX_DEST_DEST_BIT
#define	UDMA_MRAM_TX_DEST_DEST_WIDTH
#define	UDMA_MRAM_TX_DEST_DEST_MASK
#define	UDMA_MRAM_TX_DEST_DEST_RESET
#define	UDMA_MRAM_TRANS_MODE_AUTO_ENA_BIT
#define	UDMA_MRAM_TRANS_MODE_AUTO_ENA_WIDTH
#define	UDMA_MRAM_TRANS_MODE_AUTO_ENA_MASK
#define	UDMA_MRAM_TRANS_MODE_AUTO_ENA_RESET
#define	UDMA_MRAM_TRANS_MODE_XIP_EN_BIT
#define	UDMA_MRAM_TRANS_MODE_XIP_EN_WIDTH
#define	UDMA_MRAM_TRANS_MODE_XIP_EN_MASK
#define	UDMA_MRAM_TRANS_MODE_XIP_EN_RESET
#define	UDMA_MRAM_TRANS_MODE_RESERVED_BIT
#define	UDMA_MRAM_TRANS_MODE_RESERVED_WIDTH
#define	UDMA_MRAM_TRANS_MODE_RESERVED_MASK
#define	UDMA_MRAM_TRANS_MODE_RESERVED_RESET
#define	UDMA_MRAM_TRANS_MODE_XIP_HALTED_BIT
#define	UDMA_MRAM_TRANS_MODE_XIP_HALTED_WIDTH
#define	UDMA_MRAM_TRANS_MODE_XIP_HALTED_MASK
#define	UDMA_MRAM_TRANS_MODE_XIP_HALTED_RESET
#define	UDMA_MRAM_TRANS_ADDR_ADDR_BIT
#define	UDMA_MRAM_TRANS_ADDR_ADDR_WIDTH
#define	UDMA_MRAM_TRANS_ADDR_ADDR_MASK
#define	UDMA_MRAM_TRANS_ADDR_ADDR_RESET
#define	UDMA_MRAM_TRANS_SIZE_SIZE_BIT
#define	UDMA_MRAM_TRANS_SIZE_SIZE_WIDTH
#define	UDMA_MRAM_TRANS_SIZE_SIZE_MASK
#define	UDMA_MRAM_TRANS_SIZE_SIZE_RESET
#define	UDMA_MRAM_TRANS_CFG_RXTX_BIT
#define	UDMA_MRAM_TRANS_CFG_RXTX_WIDTH
#define	UDMA_MRAM_TRANS_CFG_RXTX_MASK
#define	UDMA_MRAM_TRANS_CFG_RXTX_RESET
#define	UDMA_MRAM_TRANS_CFG_VALID_BIT
#define	UDMA_MRAM_TRANS_CFG_VALID_WIDTH
#define	UDMA_MRAM_TRANS_CFG_VALID_MASK
#define	UDMA_MRAM_TRANS_CFG_VALID_RESET
#define	UDMA_MRAM_EXT_ADDR_ADDR_BIT
#define	UDMA_MRAM_EXT_ADDR_ADDR_WIDTH
#define	UDMA_MRAM_EXT_ADDR_ADDR_MASK
#define	UDMA_MRAM_EXT_ADDR_ADDR_RESET
#define	UDMA_MRAM_STATUS_ERASE_BUSY_BIT
#define	UDMA_MRAM_STATUS_ERASE_BUSY_WIDTH
#define	UDMA_MRAM_STATUS_ERASE_BUSY_MASK
#define	UDMA_MRAM_STATUS_ERASE_BUSY_RESET
#define	UDMA_MRAM_STATUS_TX_BUSY_BIT
#define	UDMA_MRAM_STATUS_TX_BUSY_WIDTH
#define	UDMA_MRAM_STATUS_TX_BUSY_MASK
#define	UDMA_MRAM_STATUS_TX_BUSY_RESET
#define	UDMA_MRAM_STATUS_RX_BUSY_BIT
#define	UDMA_MRAM_STATUS_RX_BUSY_WIDTH
#define	UDMA_MRAM_STATUS_RX_BUSY_MASK
#define	UDMA_MRAM_STATUS_RX_BUSY_RESET
#define	UDMA_MRAM_STATUS_EC_ERR_BIT
#define	UDMA_MRAM_STATUS_EC_ERR_WIDTH
#define	UDMA_MRAM_STATUS_EC_ERR_MASK
#define	UDMA_MRAM_STATUS_EC_ERR_RESET
#define	UDMA_MRAM_STATUS_UE_ERR_BIT
#define	UDMA_MRAM_STATUS_UE_ERR_WIDTH
#define	UDMA_MRAM_STATUS_UE_ERR_MASK
#define	UDMA_MRAM_STATUS_UE_ERR_RESET
#define	UDMA_MRAM_MODE_ECCBYPS_BIT
#define	UDMA_MRAM_MODE_ECCBYPS_WIDTH
#define	UDMA_MRAM_MODE_ECCBYPS_MASK
#define	UDMA_MRAM_MODE_ECCBYPS_RESET
#define	UDMA_MRAM_MODE_DPD_BIT
#define	UDMA_MRAM_MODE_DPD_WIDTH
#define	UDMA_MRAM_MODE_DPD_MASK
#define	UDMA_MRAM_MODE_DPD_RESET
#define	UDMA_MRAM_MODE_TMEN_BIT
#define	UDMA_MRAM_MODE_TMEN_WIDTH
#define	UDMA_MRAM_MODE_TMEN_MASK
#define	UDMA_MRAM_MODE_TMEN_RESET
#define	UDMA_MRAM_MODE_NVR_BIT
#define	UDMA_MRAM_MODE_NVR_WIDTH
#define	UDMA_MRAM_MODE_NVR_MASK
#define	UDMA_MRAM_MODE_NVR_RESET
#define	UDMA_MRAM_MODE_RSTB_BIT
#define	UDMA_MRAM_MODE_RSTB_WIDTH
#define	UDMA_MRAM_MODE_RSTB_MASK
#define	UDMA_MRAM_MODE_RSTB_RESET
#define	UDMA_MRAM_MODE_RETB_BIT
#define	UDMA_MRAM_MODE_RETB_WIDTH
#define	UDMA_MRAM_MODE_RETB_MASK
#define	UDMA_MRAM_MODE_RETB_RESET
#define	UDMA_MRAM_MODE_PORB_BIT
#define	UDMA_MRAM_MODE_PORB_WIDTH
#define	UDMA_MRAM_MODE_PORB_MASK
#define	UDMA_MRAM_MODE_PORB_RESET
#define	UDMA_MRAM_MODE_OPERATION_BIT
#define	UDMA_MRAM_MODE_OPERATION_WIDTH
#define	UDMA_MRAM_MODE_OPERATION_MASK
#define	UDMA_MRAM_MODE_OPERATION_RESET
#define	UDMA_MRAM_ERASE_ADDR_ADDR_LSB_BIT
#define	UDMA_MRAM_ERASE_ADDR_ADDR_LSB_WIDTH
#define	UDMA_MRAM_ERASE_ADDR_ADDR_LSB_MASK
#define	UDMA_MRAM_ERASE_ADDR_ADDR_LSB_RESET
#define	UDMA_MRAM_ERASE_ADDR_ADDR_MSB_BIT
#define	UDMA_MRAM_ERASE_ADDR_ADDR_MSB_WIDTH
#define	UDMA_MRAM_ERASE_ADDR_ADDR_MSB_MASK
#define	UDMA_MRAM_ERASE_ADDR_ADDR_MSB_RESET
#define	UDMA_MRAM_ERASE_SIZE_SIZE_BIT
#define	UDMA_MRAM_ERASE_SIZE_SIZE_WIDTH
#define	UDMA_MRAM_ERASE_SIZE_SIZE_MASK
#define	UDMA_MRAM_ERASE_SIZE_SIZE_RESET
#define	UDMA_MRAM_CLK_DIV_DATA_BIT
#define	UDMA_MRAM_CLK_DIV_DATA_WIDTH
#define	UDMA_MRAM_CLK_DIV_DATA_MASK
#define	UDMA_MRAM_CLK_DIV_DATA_RESET
#define	UDMA_MRAM_CLK_DIV_VALID_BIT
#define	UDMA_MRAM_CLK_DIV_VALID_WIDTH
#define	UDMA_MRAM_CLK_DIV_VALID_MASK
#define	UDMA_MRAM_CLK_DIV_VALID_RESET
#define	UDMA_MRAM_CLK_DIV_ENABLE_BIT
#define	UDMA_MRAM_CLK_DIV_ENABLE_WIDTH
#define	UDMA_MRAM_CLK_DIV_ENABLE_MASK
#define	UDMA_MRAM_CLK_DIV_ENABLE_RESET
#define	UDMA_MRAM_ISR_ERASE_DONE_BIT
#define	UDMA_MRAM_ISR_ERASE_DONE_WIDTH
#define	UDMA_MRAM_ISR_ERASE_DONE_MASK
#define	UDMA_MRAM_ISR_ERASE_DONE_RESET
#define	UDMA_MRAM_ISR_PROGRAM_DONE_BIT
#define	UDMA_MRAM_ISR_PROGRAM_DONE_WIDTH
#define	UDMA_MRAM_ISR_PROGRAM_DONE_MASK
#define	UDMA_MRAM_ISR_PROGRAM_DONE_RESET
#define	UDMA_MRAM_ISR_TRIM_CONFIG_DONE_BIT
#define	UDMA_MRAM_ISR_TRIM_CONFIG_DONE_WIDTH
#define	UDMA_MRAM_ISR_TRIM_CONFIG_DONE_MASK
#define	UDMA_MRAM_ISR_TRIM_CONFIG_DONE_RESET
#define	UDMA_MRAM_ISR_RX_DONE_BIT
#define	UDMA_MRAM_ISR_RX_DONE_WIDTH
#define	UDMA_MRAM_ISR_RX_DONE_MASK
#define	UDMA_MRAM_ISR_RX_DONE_RESET
#define	UDMA_MRAM_IER_ERASE_EN_BIT
#define	UDMA_MRAM_IER_ERASE_EN_WIDTH
#define	UDMA_MRAM_IER_ERASE_EN_MASK
#define	UDMA_MRAM_IER_ERASE_EN_RESET
#define	UDMA_MRAM_IER_PROGRAM_EN_BIT
#define	UDMA_MRAM_IER_PROGRAM_EN_WIDTH
#define	UDMA_MRAM_IER_PROGRAM_EN_MASK
#define	UDMA_MRAM_IER_PROGRAM_EN_RESET
#define	UDMA_MRAM_IER_TRIM_CONFIG_EN_BIT
#define	UDMA_MRAM_IER_TRIM_CONFIG_EN_WIDTH
#define	UDMA_MRAM_IER_TRIM_CONFIG_EN_MASK
#define	UDMA_MRAM_IER_TRIM_CONFIG_EN_RESET
#define	UDMA_MRAM_IER_RX_DONE_EN_BIT
#define	UDMA_MRAM_IER_RX_DONE_EN_WIDTH
#define	UDMA_MRAM_IER_RX_DONE_EN_MASK
#define	UDMA_MRAM_IER_RX_DONE_EN_RESET
#define	UDMA_MRAM_IER_XIP_ERASE_EN_BIT
#define	UDMA_MRAM_IER_XIP_ERASE_EN_WIDTH
#define	UDMA_MRAM_IER_XIP_ERASE_EN_MASK
#define	UDMA_MRAM_IER_XIP_ERASE_EN_RESET
#define	UDMA_MRAM_IER_XIP_PROGRAM_EN_BIT
#define	UDMA_MRAM_IER_XIP_PROGRAM_EN_WIDTH
#define	UDMA_MRAM_IER_XIP_PROGRAM_EN_MASK
#define	UDMA_MRAM_IER_XIP_PROGRAM_EN_RESET
#define	UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_BIT
#define	UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_WIDTH
#define	UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_MASK
#define	UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_RESET
#define	UDMA_MRAM_IER_RX_XIP_DONE_EN_BIT
#define	UDMA_MRAM_IER_RX_XIP_DONE_EN_WIDTH
#define	UDMA_MRAM_IER_RX_XIP_DONE_EN_MASK
#define	UDMA_MRAM_IER_RX_XIP_DONE_EN_RESET
#define	UDMA_MRAM_LINE_2D_LINE_BIT
#define	UDMA_MRAM_LINE_2D_LINE_WIDTH
#define	UDMA_MRAM_LINE_2D_LINE_MASK
#define	UDMA_MRAM_LINE_2D_LINE_RESET
#define	UDMA_MRAM_STRIDE_2D_STRIDE_BIT
#define	UDMA_MRAM_STRIDE_2D_STRIDE_WIDTH
#define	UDMA_MRAM_STRIDE_2D_STRIDE_MASK
#define	UDMA_MRAM_STRIDE_2D_STRIDE_RESET
#define	UDMA_MRAM_ENABLE_2D_ENABLE_BIT
#define	UDMA_MRAM_ENABLE_2D_ENABLE_WIDTH
#define	UDMA_MRAM_ENABLE_2D_ENABLE_MASK
#define	UDMA_MRAM_ENABLE_2D_ENABLE_RESET
#define	UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_BIT
#define	UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_WIDTH
#define	UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_MASK
#define	UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_RESET
#define	UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_BIT
#define	UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_WIDTH
#define	UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_MASK
#define	UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_RESET
#define	UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_BIT
#define	UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_WIDTH
#define	UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_MASK
#define	UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_RESET
#define	UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_BIT
#define	UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_WIDTH
#define	UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_MASK
#define	UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_RESET
#define	UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_BIT
#define	UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_WIDTH
#define	UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_MASK
#define	UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_RESET
#define	UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_BIT
#define	UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_WIDTH
#define	UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_MASK
#define	UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_RESET
#define	UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_BIT
#define	UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_WIDTH
#define	UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_MASK
#define	UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_RESET

Macro Definition Documentation

#define UDMA_MRAM_CLK_DIV_DATA_BIT

#define UDMA_MRAM_CLK_DIV_DATA_MASK

#define UDMA_MRAM_CLK_DIV_DATA_RESET

#define UDMA_MRAM_CLK_DIV_DATA_WIDTH

#define UDMA_MRAM_CLK_DIV_ENABLE_BIT

#define UDMA_MRAM_CLK_DIV_ENABLE_MASK

#define UDMA_MRAM_CLK_DIV_ENABLE_RESET

#define UDMA_MRAM_CLK_DIV_ENABLE_WIDTH

#define UDMA_MRAM_CLK_DIV_VALID_BIT

#define UDMA_MRAM_CLK_DIV_VALID_MASK

#define UDMA_MRAM_CLK_DIV_VALID_RESET

#define UDMA_MRAM_CLK_DIV_VALID_WIDTH

#define UDMA_MRAM_ENABLE_2D_ENABLE_BIT

#define UDMA_MRAM_ENABLE_2D_ENABLE_MASK

#define UDMA_MRAM_ENABLE_2D_ENABLE_RESET

#define UDMA_MRAM_ENABLE_2D_ENABLE_WIDTH

#define UDMA_MRAM_ERASE_ADDR_ADDR_LSB_BIT

#define UDMA_MRAM_ERASE_ADDR_ADDR_LSB_MASK

#define UDMA_MRAM_ERASE_ADDR_ADDR_LSB_RESET

#define UDMA_MRAM_ERASE_ADDR_ADDR_LSB_WIDTH

#define UDMA_MRAM_ERASE_ADDR_ADDR_MSB_BIT

#define UDMA_MRAM_ERASE_ADDR_ADDR_MSB_MASK

#define UDMA_MRAM_ERASE_ADDR_ADDR_MSB_RESET

#define UDMA_MRAM_ERASE_ADDR_ADDR_MSB_WIDTH

#define UDMA_MRAM_ERASE_SIZE_SIZE_BIT

#define UDMA_MRAM_ERASE_SIZE_SIZE_MASK

#define UDMA_MRAM_ERASE_SIZE_SIZE_RESET

#define UDMA_MRAM_ERASE_SIZE_SIZE_WIDTH

#define UDMA_MRAM_EXT_ADDR_ADDR_BIT

#define UDMA_MRAM_EXT_ADDR_ADDR_MASK

#define UDMA_MRAM_EXT_ADDR_ADDR_RESET

#define UDMA_MRAM_EXT_ADDR_ADDR_WIDTH

#define UDMA_MRAM_IER_ERASE_EN_BIT

#define UDMA_MRAM_IER_ERASE_EN_MASK

#define UDMA_MRAM_IER_ERASE_EN_RESET

#define UDMA_MRAM_IER_ERASE_EN_WIDTH

#define UDMA_MRAM_IER_PROGRAM_EN_BIT

#define UDMA_MRAM_IER_PROGRAM_EN_MASK

#define UDMA_MRAM_IER_PROGRAM_EN_RESET

#define UDMA_MRAM_IER_PROGRAM_EN_WIDTH

#define UDMA_MRAM_IER_RX_DONE_EN_BIT

#define UDMA_MRAM_IER_RX_DONE_EN_MASK

#define UDMA_MRAM_IER_RX_DONE_EN_RESET

#define UDMA_MRAM_IER_RX_DONE_EN_WIDTH

#define UDMA_MRAM_IER_RX_XIP_DONE_EN_BIT

#define UDMA_MRAM_IER_RX_XIP_DONE_EN_MASK

#define UDMA_MRAM_IER_RX_XIP_DONE_EN_RESET

#define UDMA_MRAM_IER_RX_XIP_DONE_EN_WIDTH

#define UDMA_MRAM_IER_TRIM_CONFIG_EN_BIT

#define UDMA_MRAM_IER_TRIM_CONFIG_EN_MASK

#define UDMA_MRAM_IER_TRIM_CONFIG_EN_RESET

#define UDMA_MRAM_IER_TRIM_CONFIG_EN_WIDTH

#define UDMA_MRAM_IER_XIP_ERASE_EN_BIT

#define UDMA_MRAM_IER_XIP_ERASE_EN_MASK

#define UDMA_MRAM_IER_XIP_ERASE_EN_RESET

#define UDMA_MRAM_IER_XIP_ERASE_EN_WIDTH

#define UDMA_MRAM_IER_XIP_PROGRAM_EN_BIT

#define UDMA_MRAM_IER_XIP_PROGRAM_EN_MASK

#define UDMA_MRAM_IER_XIP_PROGRAM_EN_RESET

#define UDMA_MRAM_IER_XIP_PROGRAM_EN_WIDTH

#define UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_BIT

#define UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_MASK

#define UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_RESET

#define UDMA_MRAM_IER_XIP_TRIM_CONFIG_EN_WIDTH

#define UDMA_MRAM_ISR_ERASE_DONE_BIT

#define UDMA_MRAM_ISR_ERASE_DONE_MASK

#define UDMA_MRAM_ISR_ERASE_DONE_RESET

#define UDMA_MRAM_ISR_ERASE_DONE_WIDTH

#define UDMA_MRAM_ISR_PROGRAM_DONE_BIT

#define UDMA_MRAM_ISR_PROGRAM_DONE_MASK

#define UDMA_MRAM_ISR_PROGRAM_DONE_RESET

#define UDMA_MRAM_ISR_PROGRAM_DONE_WIDTH

#define UDMA_MRAM_ISR_RX_DONE_BIT

#define UDMA_MRAM_ISR_RX_DONE_MASK

#define UDMA_MRAM_ISR_RX_DONE_RESET

#define UDMA_MRAM_ISR_RX_DONE_WIDTH

#define UDMA_MRAM_ISR_TRIM_CONFIG_DONE_BIT

#define UDMA_MRAM_ISR_TRIM_CONFIG_DONE_MASK

#define UDMA_MRAM_ISR_TRIM_CONFIG_DONE_RESET

#define UDMA_MRAM_ISR_TRIM_CONFIG_DONE_WIDTH

#define UDMA_MRAM_LINE_2D_LINE_BIT

#define UDMA_MRAM_LINE_2D_LINE_MASK

#define UDMA_MRAM_LINE_2D_LINE_RESET

#define UDMA_MRAM_LINE_2D_LINE_WIDTH

#define UDMA_MRAM_MODE_DPD_BIT

#define UDMA_MRAM_MODE_DPD_MASK

#define UDMA_MRAM_MODE_DPD_RESET

#define UDMA_MRAM_MODE_DPD_WIDTH

#define UDMA_MRAM_MODE_ECCBYPS_BIT

#define UDMA_MRAM_MODE_ECCBYPS_MASK

#define UDMA_MRAM_MODE_ECCBYPS_RESET

#define UDMA_MRAM_MODE_ECCBYPS_WIDTH

#define UDMA_MRAM_MODE_NVR_BIT

#define UDMA_MRAM_MODE_NVR_MASK

#define UDMA_MRAM_MODE_NVR_RESET

#define UDMA_MRAM_MODE_NVR_WIDTH

#define UDMA_MRAM_MODE_OPERATION_BIT

#define UDMA_MRAM_MODE_OPERATION_MASK

#define UDMA_MRAM_MODE_OPERATION_RESET

#define UDMA_MRAM_MODE_OPERATION_WIDTH

#define UDMA_MRAM_MODE_PORB_BIT

#define UDMA_MRAM_MODE_PORB_MASK

#define UDMA_MRAM_MODE_PORB_RESET

#define UDMA_MRAM_MODE_PORB_WIDTH

#define UDMA_MRAM_MODE_RETB_BIT

#define UDMA_MRAM_MODE_RETB_MASK

#define UDMA_MRAM_MODE_RETB_RESET

#define UDMA_MRAM_MODE_RETB_WIDTH

#define UDMA_MRAM_MODE_RSTB_BIT

#define UDMA_MRAM_MODE_RSTB_MASK

#define UDMA_MRAM_MODE_RSTB_RESET

#define UDMA_MRAM_MODE_RSTB_WIDTH

#define UDMA_MRAM_MODE_TMEN_BIT

#define UDMA_MRAM_MODE_TMEN_MASK

#define UDMA_MRAM_MODE_TMEN_RESET

#define UDMA_MRAM_MODE_TMEN_WIDTH

#define UDMA_MRAM_RX_DEST_DEST_BIT

#define UDMA_MRAM_RX_DEST_DEST_MASK

#define UDMA_MRAM_RX_DEST_DEST_RESET

#define UDMA_MRAM_RX_DEST_DEST_WIDTH

#define UDMA_MRAM_STATUS_EC_ERR_BIT

#define UDMA_MRAM_STATUS_EC_ERR_MASK

#define UDMA_MRAM_STATUS_EC_ERR_RESET

#define UDMA_MRAM_STATUS_EC_ERR_WIDTH

#define UDMA_MRAM_STATUS_ERASE_BUSY_BIT

#define UDMA_MRAM_STATUS_ERASE_BUSY_MASK

#define UDMA_MRAM_STATUS_ERASE_BUSY_RESET

#define UDMA_MRAM_STATUS_ERASE_BUSY_WIDTH

#define UDMA_MRAM_STATUS_RX_BUSY_BIT

#define UDMA_MRAM_STATUS_RX_BUSY_MASK

#define UDMA_MRAM_STATUS_RX_BUSY_RESET

#define UDMA_MRAM_STATUS_RX_BUSY_WIDTH

#define UDMA_MRAM_STATUS_TX_BUSY_BIT

#define UDMA_MRAM_STATUS_TX_BUSY_MASK

#define UDMA_MRAM_STATUS_TX_BUSY_RESET

#define UDMA_MRAM_STATUS_TX_BUSY_WIDTH

#define UDMA_MRAM_STATUS_UE_ERR_BIT

#define UDMA_MRAM_STATUS_UE_ERR_MASK

#define UDMA_MRAM_STATUS_UE_ERR_RESET

#define UDMA_MRAM_STATUS_UE_ERR_WIDTH

#define UDMA_MRAM_STRIDE_2D_STRIDE_BIT

#define UDMA_MRAM_STRIDE_2D_STRIDE_MASK

#define UDMA_MRAM_STRIDE_2D_STRIDE_RESET

#define UDMA_MRAM_STRIDE_2D_STRIDE_WIDTH

#define UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_BIT

#define UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_MASK

#define UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_RESET

#define UDMA_MRAM_TIMING_CFG_ADS_TIME_CNT_WIDTH

#define UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_BIT

#define UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_MASK

#define UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_RESET

#define UDMA_MRAM_TIMING_CFG_GO_SUP_TIME_CNT_WIDTH

#define UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_BIT

#define UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_MASK

#define UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_RESET

#define UDMA_MRAM_TIMING_CFG_MEN_TIME_CNT_WIDTH

#define UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_BIT

#define UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_MASK

#define UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_RESET

#define UDMA_MRAM_TIMING_CFG_PGS_TIME_CNT_WIDTH

#define UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_BIT

#define UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_MASK

#define UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_RESET

#define UDMA_MRAM_TIMING_CFG_PROG_TIME_CNT_WIDTH

#define UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_BIT

#define UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_MASK

#define UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_RESET

#define UDMA_MRAM_TIMING_CFG_RW_TIME_CNT_WIDTH

#define UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_BIT

#define UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_MASK

#define UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_RESET

#define UDMA_MRAM_TIMING_CFG_STROBE_TIME_CNT_WIDTH

#define UDMA_MRAM_TRANS_ADDR_ADDR_BIT

#define UDMA_MRAM_TRANS_ADDR_ADDR_MASK

#define UDMA_MRAM_TRANS_ADDR_ADDR_RESET

#define UDMA_MRAM_TRANS_ADDR_ADDR_WIDTH

#define UDMA_MRAM_TRANS_CFG_RXTX_BIT

#define UDMA_MRAM_TRANS_CFG_RXTX_MASK

#define UDMA_MRAM_TRANS_CFG_RXTX_RESET

#define UDMA_MRAM_TRANS_CFG_RXTX_WIDTH

#define UDMA_MRAM_TRANS_CFG_VALID_BIT

#define UDMA_MRAM_TRANS_CFG_VALID_MASK

#define UDMA_MRAM_TRANS_CFG_VALID_RESET

#define UDMA_MRAM_TRANS_CFG_VALID_WIDTH

#define UDMA_MRAM_TRANS_MODE_AUTO_ENA_BIT

#define UDMA_MRAM_TRANS_MODE_AUTO_ENA_MASK

#define UDMA_MRAM_TRANS_MODE_AUTO_ENA_RESET

#define UDMA_MRAM_TRANS_MODE_AUTO_ENA_WIDTH

#define UDMA_MRAM_TRANS_MODE_RESERVED_BIT

#define UDMA_MRAM_TRANS_MODE_RESERVED_MASK

#define UDMA_MRAM_TRANS_MODE_RESERVED_RESET

#define UDMA_MRAM_TRANS_MODE_RESERVED_WIDTH

#define UDMA_MRAM_TRANS_MODE_XIP_EN_BIT

#define UDMA_MRAM_TRANS_MODE_XIP_EN_MASK

#define UDMA_MRAM_TRANS_MODE_XIP_EN_RESET

#define UDMA_MRAM_TRANS_MODE_XIP_EN_WIDTH

#define UDMA_MRAM_TRANS_MODE_XIP_HALTED_BIT

#define UDMA_MRAM_TRANS_MODE_XIP_HALTED_MASK

#define UDMA_MRAM_TRANS_MODE_XIP_HALTED_RESET

#define UDMA_MRAM_TRANS_MODE_XIP_HALTED_WIDTH

#define UDMA_MRAM_TRANS_SIZE_SIZE_BIT

#define UDMA_MRAM_TRANS_SIZE_SIZE_MASK

#define UDMA_MRAM_TRANS_SIZE_SIZE_RESET

#define UDMA_MRAM_TRANS_SIZE_SIZE_WIDTH

#define UDMA_MRAM_TX_DEST_DEST_BIT

#define UDMA_MRAM_TX_DEST_DEST_MASK

#define UDMA_MRAM_TX_DEST_DEST_RESET

#define UDMA_MRAM_TX_DEST_DEST_WIDTH