udma_filter_regfields.h File Reference

Macros
#define	UDMA_FILTER_REG_TX_CH0_CFG_SIZE_BIT
#define	UDMA_FILTER_REG_TX_CH0_CFG_SIZE_WIDTH
#define	UDMA_FILTER_REG_TX_CH0_CFG_SIZE_MASK
#define	UDMA_FILTER_REG_TX_CH0_CFG_SIZE_RESET
#define	UDMA_FILTER_REG_TX_CH0_CFG_MODE_BIT
#define	UDMA_FILTER_REG_TX_CH0_CFG_MODE_WIDTH
#define	UDMA_FILTER_REG_TX_CH0_CFG_MODE_MASK
#define	UDMA_FILTER_REG_TX_CH0_CFG_MODE_RESET
#define	UDMA_FILTER_REG_TX_CH1_CFG_SIZE_BIT
#define	UDMA_FILTER_REG_TX_CH1_CFG_SIZE_WIDTH
#define	UDMA_FILTER_REG_TX_CH1_CFG_SIZE_MASK
#define	UDMA_FILTER_REG_TX_CH1_CFG_SIZE_RESET
#define	UDMA_FILTER_REG_TX_CH1_CFG_MODE_BIT
#define	UDMA_FILTER_REG_TX_CH1_CFG_MODE_WIDTH
#define	UDMA_FILTER_REG_TX_CH1_CFG_MODE_MASK
#define	UDMA_FILTER_REG_TX_CH1_CFG_MODE_RESET
#define	UDMA_FILTER_REG_RX_CH_CFG_SIZE_BIT
#define	UDMA_FILTER_REG_RX_CH_CFG_SIZE_WIDTH
#define	UDMA_FILTER_REG_RX_CH_CFG_SIZE_MASK
#define	UDMA_FILTER_REG_RX_CH_CFG_SIZE_RESET
#define	UDMA_FILTER_REG_RX_CH_CFG_MODE_BIT
#define	UDMA_FILTER_REG_RX_CH_CFG_MODE_WIDTH
#define	UDMA_FILTER_REG_RX_CH_CFG_MODE_MASK
#define	UDMA_FILTER_REG_RX_CH_CFG_MODE_RESET
#define	UDMA_FILTER_REG_AU_CFG_SIGNED_BIT
#define	UDMA_FILTER_REG_AU_CFG_SIGNED_WIDTH
#define	UDMA_FILTER_REG_AU_CFG_SIGNED_MASK
#define	UDMA_FILTER_REG_AU_CFG_SIGNED_RESET
#define	UDMA_FILTER_REG_AU_CFG_BYPASS_BIT
#define	UDMA_FILTER_REG_AU_CFG_BYPASS_WIDTH
#define	UDMA_FILTER_REG_AU_CFG_BYPASS_MASK
#define	UDMA_FILTER_REG_AU_CFG_BYPASS_RESET
#define	UDMA_FILTER_REG_AU_CFG_MODE_BIT
#define	UDMA_FILTER_REG_AU_CFG_MODE_WIDTH
#define	UDMA_FILTER_REG_AU_CFG_MODE_MASK
#define	UDMA_FILTER_REG_AU_CFG_MODE_RESET
#define	UDMA_FILTER_REG_AU_CFG_SHIFT_BIT
#define	UDMA_FILTER_REG_AU_CFG_SHIFT_WIDTH
#define	UDMA_FILTER_REG_AU_CFG_SHIFT_MASK
#define	UDMA_FILTER_REG_AU_CFG_SHIFT_RESET
#define	UDMA_FILTER_REG_BINCU_CNT_COUNT_BIT
#define	UDMA_FILTER_REG_BINCU_CNT_COUNT_WIDTH
#define	UDMA_FILTER_REG_BINCU_CNT_COUNT_MASK
#define	UDMA_FILTER_REG_BINCU_CNT_COUNT_RESET
#define	UDMA_FILTER_REG_BINCU_CNT_EN_BIT
#define	UDMA_FILTER_REG_BINCU_CNT_EN_WIDTH
#define	UDMA_FILTER_REG_BINCU_CNT_EN_MASK
#define	UDMA_FILTER_REG_BINCU_CNT_EN_RESET
#define	UDMA_FILTER_REG_FILT_CMD_START_BIT
#define	UDMA_FILTER_REG_FILT_CMD_START_WIDTH
#define	UDMA_FILTER_REG_FILT_CMD_START_MASK
#define	UDMA_FILTER_REG_FILT_CMD_START_RESET
#define	UDMA_FILTER_REG_STATUS_DONE_BIT
#define	UDMA_FILTER_REG_STATUS_DONE_WIDTH
#define	UDMA_FILTER_REG_STATUS_DONE_MASK
#define	UDMA_FILTER_REG_STATUS_DONE_RESET

Macro Definition Documentation

#define UDMA_FILTER_REG_AU_CFG_BYPASS_BIT

#define UDMA_FILTER_REG_AU_CFG_BYPASS_MASK

#define UDMA_FILTER_REG_AU_CFG_BYPASS_RESET

#define UDMA_FILTER_REG_AU_CFG_BYPASS_WIDTH

#define UDMA_FILTER_REG_AU_CFG_MODE_BIT

#define UDMA_FILTER_REG_AU_CFG_MODE_MASK

#define UDMA_FILTER_REG_AU_CFG_MODE_RESET

#define UDMA_FILTER_REG_AU_CFG_MODE_WIDTH

#define UDMA_FILTER_REG_AU_CFG_SHIFT_BIT

#define UDMA_FILTER_REG_AU_CFG_SHIFT_MASK

#define UDMA_FILTER_REG_AU_CFG_SHIFT_RESET

#define UDMA_FILTER_REG_AU_CFG_SHIFT_WIDTH

#define UDMA_FILTER_REG_AU_CFG_SIGNED_BIT

#define UDMA_FILTER_REG_AU_CFG_SIGNED_MASK

#define UDMA_FILTER_REG_AU_CFG_SIGNED_RESET

#define UDMA_FILTER_REG_AU_CFG_SIGNED_WIDTH

#define UDMA_FILTER_REG_BINCU_CNT_COUNT_BIT

#define UDMA_FILTER_REG_BINCU_CNT_COUNT_MASK

#define UDMA_FILTER_REG_BINCU_CNT_COUNT_RESET

#define UDMA_FILTER_REG_BINCU_CNT_COUNT_WIDTH

#define UDMA_FILTER_REG_BINCU_CNT_EN_BIT

#define UDMA_FILTER_REG_BINCU_CNT_EN_MASK

#define UDMA_FILTER_REG_BINCU_CNT_EN_RESET

#define UDMA_FILTER_REG_BINCU_CNT_EN_WIDTH

#define UDMA_FILTER_REG_FILT_CMD_START_BIT

#define UDMA_FILTER_REG_FILT_CMD_START_MASK

#define UDMA_FILTER_REG_FILT_CMD_START_RESET

#define UDMA_FILTER_REG_FILT_CMD_START_WIDTH

#define UDMA_FILTER_REG_RX_CH_CFG_MODE_BIT

#define UDMA_FILTER_REG_RX_CH_CFG_MODE_MASK

#define UDMA_FILTER_REG_RX_CH_CFG_MODE_RESET

#define UDMA_FILTER_REG_RX_CH_CFG_MODE_WIDTH

#define UDMA_FILTER_REG_RX_CH_CFG_SIZE_BIT

#define UDMA_FILTER_REG_RX_CH_CFG_SIZE_MASK

#define UDMA_FILTER_REG_RX_CH_CFG_SIZE_RESET

#define UDMA_FILTER_REG_RX_CH_CFG_SIZE_WIDTH

#define UDMA_FILTER_REG_STATUS_DONE_BIT

#define UDMA_FILTER_REG_STATUS_DONE_MASK

#define UDMA_FILTER_REG_STATUS_DONE_RESET

#define UDMA_FILTER_REG_STATUS_DONE_WIDTH

#define UDMA_FILTER_REG_TX_CH0_CFG_MODE_BIT

#define UDMA_FILTER_REG_TX_CH0_CFG_MODE_MASK

#define UDMA_FILTER_REG_TX_CH0_CFG_MODE_RESET

#define UDMA_FILTER_REG_TX_CH0_CFG_MODE_WIDTH

#define UDMA_FILTER_REG_TX_CH0_CFG_SIZE_BIT

#define UDMA_FILTER_REG_TX_CH0_CFG_SIZE_MASK

#define UDMA_FILTER_REG_TX_CH0_CFG_SIZE_RESET

#define UDMA_FILTER_REG_TX_CH0_CFG_SIZE_WIDTH

#define UDMA_FILTER_REG_TX_CH1_CFG_MODE_BIT

#define UDMA_FILTER_REG_TX_CH1_CFG_MODE_MASK

#define UDMA_FILTER_REG_TX_CH1_CFG_MODE_RESET

#define UDMA_FILTER_REG_TX_CH1_CFG_MODE_WIDTH

#define UDMA_FILTER_REG_TX_CH1_CFG_SIZE_BIT

#define UDMA_FILTER_REG_TX_CH1_CFG_SIZE_MASK

#define UDMA_FILTER_REG_TX_CH1_CFG_SIZE_RESET

#define UDMA_FILTER_REG_TX_CH1_CFG_SIZE_WIDTH