FreeRTOS port on GAP8/RISC-V
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#define UDMA_AES_CFG_MODE_BIT |
#define UDMA_AES_CFG_MODE_MASK |
#define UDMA_AES_CFG_MODE_RESET |
#define UDMA_AES_CFG_MODE_WIDTH |
#define UDMA_AES_DEST_RX_DEST_BIT |
#define UDMA_AES_DEST_RX_DEST_MASK |
#define UDMA_AES_DEST_RX_DEST_RESET |
#define UDMA_AES_DEST_RX_DEST_WIDTH |
#define UDMA_AES_DEST_TX_DEST_BIT |
#define UDMA_AES_DEST_TX_DEST_MASK |
#define UDMA_AES_DEST_TX_DEST_RESET |
#define UDMA_AES_DEST_TX_DEST_WIDTH |
#define UDMA_AES_SETUP_BLOCK_RST_BIT |
#define UDMA_AES_SETUP_BLOCK_RST_MASK |
#define UDMA_AES_SETUP_BLOCK_RST_RESET |
#define UDMA_AES_SETUP_BLOCK_RST_WIDTH |
#define UDMA_AES_SETUP_ECB_CBC_BIT |
#define UDMA_AES_SETUP_ECB_CBC_MASK |
#define UDMA_AES_SETUP_ECB_CBC_RESET |
#define UDMA_AES_SETUP_ECB_CBC_WIDTH |
#define UDMA_AES_SETUP_ENC_DEC_BIT |
#define UDMA_AES_SETUP_ENC_DEC_MASK |
#define UDMA_AES_SETUP_ENC_DEC_RESET |
#define UDMA_AES_SETUP_ENC_DEC_WIDTH |
#define UDMA_AES_SETUP_FIFO_CLR_BIT |
#define UDMA_AES_SETUP_FIFO_CLR_MASK |
#define UDMA_AES_SETUP_FIFO_CLR_RESET |
#define UDMA_AES_SETUP_FIFO_CLR_WIDTH |
#define UDMA_AES_SETUP_KEY_INIT_BIT |
#define UDMA_AES_SETUP_KEY_INIT_MASK |
#define UDMA_AES_SETUP_KEY_INIT_RESET |
#define UDMA_AES_SETUP_KEY_INIT_WIDTH |
#define UDMA_AES_SETUP_KEY_TYPE_BIT |
#define UDMA_AES_SETUP_KEY_TYPE_MASK |
#define UDMA_AES_SETUP_KEY_TYPE_RESET |
#define UDMA_AES_SETUP_KEY_TYPE_WIDTH |
#define UDMA_AES_SETUP_RESERVED_BIT |
#define UDMA_AES_SETUP_RESERVED_MASK |
#define UDMA_AES_SETUP_RESERVED_RESET |
#define UDMA_AES_SETUP_RESERVED_WIDTH |