FreeRTOS port on GAP8/RISC-V
|
#define QUIDDIKEY_AR_QK_ALLOW_ENROLL_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_ENROLL_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_ENROLL_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_ENROLL_WIDTH |
#define QUIDDIKEY_AR_QK_ALLOW_GENERATE_RANDOM_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_GENERATE_RANDOM_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_GENERATE_RANDOM_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_GENERATE_RANDOM_WIDTH |
#define QUIDDIKEY_AR_QK_ALLOW_GET_KEY_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_GET_KEY_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_GET_KEY_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_GET_KEY_WIDTH |
#define QUIDDIKEY_AR_QK_ALLOW_START_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_START_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_START_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_START_WIDTH |
#define QUIDDIKEY_AR_QK_ALLOW_STOP_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_STOP_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_STOP_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_STOP_WIDTH |
#define QUIDDIKEY_AR_QK_ALLOW_UNWRAP_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_UNWRAP_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_UNWRAP_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_UNWRAP_WIDTH |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_GENERATED_RANDOM_BIT |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_GENERATED_RANDOM_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_GENERATED_RANDOM_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_GENERATED_RANDOM_WIDTH |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_MASK |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_RESET |
#define QUIDDIKEY_AR_QK_ALLOW_WRAP_WIDTH |
#define QUIDDIKEY_CR_QK_ENROLL_BIT |
#define QUIDDIKEY_CR_QK_ENROLL_MASK |
#define QUIDDIKEY_CR_QK_ENROLL_RESET |
#define QUIDDIKEY_CR_QK_ENROLL_WIDTH |
#define QUIDDIKEY_CR_QK_GENERATE_RANDOM_BIT |
#define QUIDDIKEY_CR_QK_GENERATE_RANDOM_MASK |
#define QUIDDIKEY_CR_QK_GENERATE_RANDOM_RESET |
#define QUIDDIKEY_CR_QK_GENERATE_RANDOM_WIDTH |
#define QUIDDIKEY_CR_QK_GET_KEY_BIT |
#define QUIDDIKEY_CR_QK_GET_KEY_MASK |
#define QUIDDIKEY_CR_QK_GET_KEY_RESET |
#define QUIDDIKEY_CR_QK_GET_KEY_WIDTH |
#define QUIDDIKEY_CR_QK_START_BIT |
#define QUIDDIKEY_CR_QK_START_MASK |
#define QUIDDIKEY_CR_QK_START_RESET |
#define QUIDDIKEY_CR_QK_START_WIDTH |
#define QUIDDIKEY_CR_QK_STOP_BIT |
#define QUIDDIKEY_CR_QK_STOP_MASK |
#define QUIDDIKEY_CR_QK_STOP_RESET |
#define QUIDDIKEY_CR_QK_STOP_WIDTH |
#define QUIDDIKEY_CR_QK_UNWRAP_BIT |
#define QUIDDIKEY_CR_QK_UNWRAP_MASK |
#define QUIDDIKEY_CR_QK_UNWRAP_RESET |
#define QUIDDIKEY_CR_QK_UNWRAP_WIDTH |
#define QUIDDIKEY_CR_QK_WRAP_BIT |
#define QUIDDIKEY_CR_QK_WRAP_GENERATED_RANDOM_BIT |
#define QUIDDIKEY_CR_QK_WRAP_GENERATED_RANDOM_MASK |
#define QUIDDIKEY_CR_QK_WRAP_GENERATED_RANDOM_RESET |
#define QUIDDIKEY_CR_QK_WRAP_GENERATED_RANDOM_WIDTH |
#define QUIDDIKEY_CR_QK_WRAP_MASK |
#define QUIDDIKEY_CR_QK_WRAP_RESET |
#define QUIDDIKEY_CR_QK_WRAP_WIDTH |
#define QUIDDIKEY_CR_QK_ZEROIZE_BIT |
#define QUIDDIKEY_CR_QK_ZEROIZE_MASK |
#define QUIDDIKEY_CR_QK_ZEROIZE_RESET |
#define QUIDDIKEY_CR_QK_ZEROIZE_WIDTH |
#define QUIDDIKEY_DIR_QK_DI_BIT |
#define QUIDDIKEY_DIR_QK_DI_MASK |
#define QUIDDIKEY_DIR_QK_DI_RESET |
#define QUIDDIKEY_DIR_QK_DI_WIDTH |
#define QUIDDIKEY_DOR_QK_DO_BIT |
#define QUIDDIKEY_DOR_QK_DO_MASK |
#define QUIDDIKEY_DOR_QK_DO_RESET |
#define QUIDDIKEY_DOR_QK_DO_WIDTH |
#define QUIDDIKEY_HW_ID_QK_HW_ID_BIT |
#define QUIDDIKEY_HW_ID_QK_HW_ID_MASK |
#define QUIDDIKEY_HW_ID_QK_HW_ID_RESET |
#define QUIDDIKEY_HW_ID_QK_HW_ID_WIDTH |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_BIST_BIT |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_BIST_MASK |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_BIST_RESET |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_BIST_WIDTH |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_TYPE_BIT |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_TYPE_MASK |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_TYPE_RESET |
#define QUIDDIKEY_HW_INFO_QK_CONFIG_TYPE_WIDTH |
#define QUIDDIKEY_HW_RUC0_QK_RESTRICT_USER_CONTEXT_0_BIT |
#define QUIDDIKEY_HW_RUC0_QK_RESTRICT_USER_CONTEXT_0_MASK |
#define QUIDDIKEY_HW_RUC0_QK_RESTRICT_USER_CONTEXT_0_RESET |
#define QUIDDIKEY_HW_RUC0_QK_RESTRICT_USER_CONTEXT_0_WIDTH |
#define QUIDDIKEY_HW_RUC1_QK_RESTRICT_USER_CONTEXT_1_BIT |
#define QUIDDIKEY_HW_RUC1_QK_RESTRICT_USER_CONTEXT_1_MASK |
#define QUIDDIKEY_HW_RUC1_QK_RESTRICT_USER_CONTEXT_1_RESET |
#define QUIDDIKEY_HW_RUC1_QK_RESTRICT_USER_CONTEXT_1_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_ENROLL_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_ENROLL_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_ENROLL_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_ENROLL_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GENERATE_RANDOM_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GENERATE_RANDOM_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GENERATE_RANDOM_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GENERATE_RANDOM_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GET_KEY_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GET_KEY_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GET_KEY_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_GET_KEY_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_START_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_START_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_START_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_START_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_STOP_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_STOP_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_STOP_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_STOP_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_UNWRAP_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_UNWRAP_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_UNWRAP_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_UNWRAP_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_GENERATED_RANDOM_BIT |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_GENERATED_RANDOM_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_GENERATED_RANDOM_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_GENERATED_RANDOM_WIDTH |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_MASK |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_RESET |
#define QUIDDIKEY_HW_SETTING_QK_DISABLE_WRAP_WIDTH |
#define QUIDDIKEY_HW_VER_QK_HW_REV_BIT |
#define QUIDDIKEY_HW_VER_QK_HW_REV_MASK |
#define QUIDDIKEY_HW_VER_QK_HW_REV_RESET |
#define QUIDDIKEY_HW_VER_QK_HW_REV_WIDTH |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MAJOR_BIT |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MAJOR_MASK |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MAJOR_RESET |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MAJOR_WIDTH |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MINOR_BIT |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MINOR_MASK |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MINOR_RESET |
#define QUIDDIKEY_HW_VER_QK_HW_VERSION_MINOR_WIDTH |
#define QUIDDIKEY_IER_QK_INT_EN_BIT |
#define QUIDDIKEY_IER_QK_INT_EN_MASK |
#define QUIDDIKEY_IER_QK_INT_EN_RESET |
#define QUIDDIKEY_IER_QK_INT_EN_WIDTH |
#define QUIDDIKEY_IF_SR_APB_ERROR_BIT |
#define QUIDDIKEY_IF_SR_APB_ERROR_MASK |
#define QUIDDIKEY_IF_SR_APB_ERROR_RESET |
#define QUIDDIKEY_IF_SR_APB_ERROR_WIDTH |
#define QUIDDIKEY_IMR_QK_INT_EN_BUSY_BIT |
#define QUIDDIKEY_IMR_QK_INT_EN_BUSY_MASK |
#define QUIDDIKEY_IMR_QK_INT_EN_BUSY_RESET |
#define QUIDDIKEY_IMR_QK_INT_EN_BUSY_WIDTH |
#define QUIDDIKEY_IMR_QK_INT_EN_DI_REQUEST_BIT |
#define QUIDDIKEY_IMR_QK_INT_EN_DI_REQUEST_MASK |
#define QUIDDIKEY_IMR_QK_INT_EN_DI_REQUEST_RESET |
#define QUIDDIKEY_IMR_QK_INT_EN_DI_REQUEST_WIDTH |
#define QUIDDIKEY_IMR_QK_INT_EN_DO_REQUEST_BIT |
#define QUIDDIKEY_IMR_QK_INT_EN_DO_REQUEST_MASK |
#define QUIDDIKEY_IMR_QK_INT_EN_DO_REQUEST_RESET |
#define QUIDDIKEY_IMR_QK_INT_EN_DO_REQUEST_WIDTH |
#define QUIDDIKEY_IMR_QK_INT_EN_ERROR_BIT |
#define QUIDDIKEY_IMR_QK_INT_EN_ERROR_MASK |
#define QUIDDIKEY_IMR_QK_INT_EN_ERROR_RESET |
#define QUIDDIKEY_IMR_QK_INT_EN_ERROR_WIDTH |
#define QUIDDIKEY_IMR_QK_INT_EN_OK_BIT |
#define QUIDDIKEY_IMR_QK_INT_EN_OK_MASK |
#define QUIDDIKEY_IMR_QK_INT_EN_OK_RESET |
#define QUIDDIKEY_IMR_QK_INT_EN_OK_WIDTH |
#define QUIDDIKEY_IMR_QK_INT_EN_REJECTED_BIT |
#define QUIDDIKEY_IMR_QK_INT_EN_REJECTED_MASK |
#define QUIDDIKEY_IMR_QK_INT_EN_REJECTED_RESET |
#define QUIDDIKEY_IMR_QK_INT_EN_REJECTED_WIDTH |
#define QUIDDIKEY_IMR_QK_INT_EN_ZEROIZED_BIT |
#define QUIDDIKEY_IMR_QK_INT_EN_ZEROIZED_MASK |
#define QUIDDIKEY_IMR_QK_INT_EN_ZEROIZED_RESET |
#define QUIDDIKEY_IMR_QK_INT_EN_ZEROIZED_WIDTH |
#define QUIDDIKEY_ISR_QK_INT_BUSY_BIT |
#define QUIDDIKEY_ISR_QK_INT_BUSY_MASK |
#define QUIDDIKEY_ISR_QK_INT_BUSY_RESET |
#define QUIDDIKEY_ISR_QK_INT_BUSY_WIDTH |
#define QUIDDIKEY_ISR_QK_INT_DI_REQUEST_BIT |
#define QUIDDIKEY_ISR_QK_INT_DI_REQUEST_MASK |
#define QUIDDIKEY_ISR_QK_INT_DI_REQUEST_RESET |
#define QUIDDIKEY_ISR_QK_INT_DI_REQUEST_WIDTH |
#define QUIDDIKEY_ISR_QK_INT_DO_REQUEST_BIT |
#define QUIDDIKEY_ISR_QK_INT_DO_REQUEST_MASK |
#define QUIDDIKEY_ISR_QK_INT_DO_REQUEST_RESET |
#define QUIDDIKEY_ISR_QK_INT_DO_REQUEST_WIDTH |
#define QUIDDIKEY_ISR_QK_INT_ERROR_BIT |
#define QUIDDIKEY_ISR_QK_INT_ERROR_MASK |
#define QUIDDIKEY_ISR_QK_INT_ERROR_RESET |
#define QUIDDIKEY_ISR_QK_INT_ERROR_WIDTH |
#define QUIDDIKEY_ISR_QK_INT_OK_BIT |
#define QUIDDIKEY_ISR_QK_INT_OK_MASK |
#define QUIDDIKEY_ISR_QK_INT_OK_RESET |
#define QUIDDIKEY_ISR_QK_INT_OK_WIDTH |
#define QUIDDIKEY_ISR_QK_INT_REJECTED_BIT |
#define QUIDDIKEY_ISR_QK_INT_REJECTED_MASK |
#define QUIDDIKEY_ISR_QK_INT_REJECTED_RESET |
#define QUIDDIKEY_ISR_QK_INT_REJECTED_WIDTH |
#define QUIDDIKEY_ISR_QK_INT_ZEROIZED_BIT |
#define QUIDDIKEY_ISR_QK_INT_ZEROIZED_MASK |
#define QUIDDIKEY_ISR_QK_INT_ZEROIZED_RESET |
#define QUIDDIKEY_ISR_QK_INT_ZEROIZED_WIDTH |
#define QUIDDIKEY_KEY_DEST_QK_DEST_KO_BIT |
#define QUIDDIKEY_KEY_DEST_QK_DEST_KO_MASK |
#define QUIDDIKEY_KEY_DEST_QK_DEST_KO_RESET |
#define QUIDDIKEY_KEY_DEST_QK_DEST_KO_WIDTH |
#define QUIDDIKEY_KEY_DEST_QK_DEST_REG_BIT |
#define QUIDDIKEY_KEY_DEST_QK_DEST_REG_MASK |
#define QUIDDIKEY_KEY_DEST_QK_DEST_REG_RESET |
#define QUIDDIKEY_KEY_DEST_QK_DEST_REG_WIDTH |
#define QUIDDIKEY_MISC_QK_DATA_ENDIANNESS_BIT |
#define QUIDDIKEY_MISC_QK_DATA_ENDIANNESS_MASK |
#define QUIDDIKEY_MISC_QK_DATA_ENDIANNESS_RESET |
#define QUIDDIKEY_MISC_QK_DATA_ENDIANNESS_WIDTH |
#define QUIDDIKEY_SR_QK_BUSY_BIT |
#define QUIDDIKEY_SR_QK_BUSY_MASK |
#define QUIDDIKEY_SR_QK_BUSY_RESET |
#define QUIDDIKEY_SR_QK_BUSY_WIDTH |
#define QUIDDIKEY_SR_QK_DI_REQUEST_BIT |
#define QUIDDIKEY_SR_QK_DI_REQUEST_MASK |
#define QUIDDIKEY_SR_QK_DI_REQUEST_RESET |
#define QUIDDIKEY_SR_QK_DI_REQUEST_WIDTH |
#define QUIDDIKEY_SR_QK_DO_REQUEST_BIT |
#define QUIDDIKEY_SR_QK_DO_REQUEST_MASK |
#define QUIDDIKEY_SR_QK_DO_REQUEST_RESET |
#define QUIDDIKEY_SR_QK_DO_REQUEST_WIDTH |
#define QUIDDIKEY_SR_QK_ERROR_BIT |
#define QUIDDIKEY_SR_QK_ERROR_MASK |
#define QUIDDIKEY_SR_QK_ERROR_RESET |
#define QUIDDIKEY_SR_QK_ERROR_WIDTH |
#define QUIDDIKEY_SR_QK_OK_BIT |
#define QUIDDIKEY_SR_QK_OK_MASK |
#define QUIDDIKEY_SR_QK_OK_RESET |
#define QUIDDIKEY_SR_QK_OK_WIDTH |
#define QUIDDIKEY_SR_QK_REJECTED_BIT |
#define QUIDDIKEY_SR_QK_REJECTED_MASK |
#define QUIDDIKEY_SR_QK_REJECTED_RESET |
#define QUIDDIKEY_SR_QK_REJECTED_WIDTH |
#define QUIDDIKEY_SR_QK_ZEROIZED_BIT |
#define QUIDDIKEY_SR_QK_ZEROIZED_MASK |
#define QUIDDIKEY_SR_QK_ZEROIZED_RESET |
#define QUIDDIKEY_SR_QK_ZEROIZED_WIDTH |
#define QUIDDIKEY_TEST_QK_ALLOW_BIST_BIT |
#define QUIDDIKEY_TEST_QK_ALLOW_BIST_MASK |
#define QUIDDIKEY_TEST_QK_ALLOW_BIST_RESET |
#define QUIDDIKEY_TEST_QK_ALLOW_BIST_WIDTH |
#define QUIDDIKEY_TEST_QK_BIST_ACTIVE_BIT |
#define QUIDDIKEY_TEST_QK_BIST_ACTIVE_MASK |
#define QUIDDIKEY_TEST_QK_BIST_ACTIVE_RESET |
#define QUIDDIKEY_TEST_QK_BIST_ACTIVE_WIDTH |
#define QUIDDIKEY_TEST_QK_BIST_ENABLE_BIT |
#define QUIDDIKEY_TEST_QK_BIST_ENABLE_MASK |
#define QUIDDIKEY_TEST_QK_BIST_ENABLE_RESET |
#define QUIDDIKEY_TEST_QK_BIST_ENABLE_WIDTH |
#define QUIDDIKEY_TEST_QK_BIST_ERROR_BIT |
#define QUIDDIKEY_TEST_QK_BIST_ERROR_MASK |
#define QUIDDIKEY_TEST_QK_BIST_ERROR_RESET |
#define QUIDDIKEY_TEST_QK_BIST_ERROR_WIDTH |
#define QUIDDIKEY_TEST_QK_BIST_OK_BIT |
#define QUIDDIKEY_TEST_QK_BIST_OK_MASK |
#define QUIDDIKEY_TEST_QK_BIST_OK_RESET |
#define QUIDDIKEY_TEST_QK_BIST_OK_WIDTH |
#define QUIDDIKEY_TEST_QK_BIST_RUNNING_BIT |
#define QUIDDIKEY_TEST_QK_BIST_RUNNING_MASK |
#define QUIDDIKEY_TEST_QK_BIST_RUNNING_RESET |
#define QUIDDIKEY_TEST_QK_BIST_RUNNING_WIDTH |