Macros
#define	ARCHI_FC_CID

#define	ARCHI_HAS_FC_ITC

#define	ARCHI_HAS_L2_ALIAS

#define	L2_PRIV0_SIZE

#define	L2_PRIV1_SIZE

#define	L2_SHARED_SIZE

#define	ARCHI_HAS_L2_PRIV0_TS

#define	ARCHI_HAS_L2_PRIV1_TS

#define	ARCHI_L2_TS_OFFSET

#define	ROM_SIZE

#define	FLL_OFFSET

#define	GPIO_OFFSET

#define	UDMA_OFFSET

#define	UDMA_CHAN_LIN_OFFSET

#define	UDMA_CHAN_2D_OFFSET

#define	UDMA_CHAN_FIFO_OFFSET

#define	APB_SOC_CTRL_OFFSET

#define	ADV_TIMER_OFFSET

#define	SOC_EU_OFFSET

#define	PMU_OFFSET

#define	RTC_BASE_OFFSET

#define	FC_ICACHE_OFFSET

#define	FC_ITC_OFFSET

#define	I3C0_OFFSET

#define	FC_TIMER_OFFSET

#define	DPHY_OFFSET

#define	CSI2_OFFSET

#define	MPU_OFFSET

#define	EFUSE_OFFSET

#define	DEBUG_OFFSET

#define	STDOUT_OFFSET

#define	QUIDDIKEY_OFFSET

#define	ARCHI_REF_CLOCK

#define	ARCHI_FLL_REF_CLOCK

#define	ARCHI_FREQ_INIT

#define	ARCHI_NB_FLL

#define	FLL_ID_PERIPH

#define	FLL_ID_FC

#define	FLL_ID_CL

#define	ARCHI_NB_TIMER_FC

#define	TIMER_SIZE_LOG2

#define	TIMER_SIZE

#define	FC_TIMER(id)

#define	UDMA_NB_CHAN_LIN

#define	UDMA_NB_CHAN_2D

#define	UDMA_NB_CHAN_FIFO

#define	UDMA_NB_TIMEOUT

#define	UDMA_HAS_SPIM

#define	UDMA_HAS_UART

#define	UDMA_HAS_I2C

#define	UDMA_HAS_HYPER

#define	UDMA_HAS_JTAG_FIFO

#define	UDMA_HAS_I2S

#define	UDMA_HAS_CPI

#define	UDMA_HAS_CSI2

#define	UDMA_HAS_MRAM

#define	UDMA_HAS_FILTER

#define	UDMA_HAS_TIMESTAMP

#define	UDMA_HAS_AES

#define	UDMA_HAS_ASRC

#define	UDMA_HAS_FFC

#define	UDMA_NB_SPIM

#define	UDMA_NB_UART

#define	UDMA_NB_I2C

#define	UDMA_NB_HYPER

#define	UDMA_NB_JTAG_FIFO

#define	UDMA_NB_I2S

#define	UDMA_NB_CPI

#define	UDMA_NB_CSI2

#define	UDMA_NB_MRAM

#define	UDMA_NB_FILTER

#define	UDMA_NB_TIMESTAMP

#define	UDMA_NB_AES

#define	UDMA_NB_SFU

#define	UDMA_NB_ASRC

#define	UDMA_NB_FFC

#define	UDMA_NB_PERIPH

#define	UDMA_PERIPH_SIZE_LOG2

#define	UDMA_PERIPH_SIZE

#define	UDMA_CHAN_LIN_SIZE_LOG2

#define	UDMA_CHAN_LIN_SIZE

#define	UDMA_CHAN_2D_SIZE_LOG2

#define	UDMA_CHAN_2D_SIZE

#define	UDMA_CHAN_FIFO_SIZE_LOG2

#define	UDMA_CHAN_FIFO_SIZE

#define	UDMA_CHAN_LIN_ID(id)

#define	UDMA_CHAN_2D_ID(id)

#define	UDMA_CHAN_FIFO_ID(id)

#define	UDMA_SPIM_ID(id)

#define	UDMA_UART_ID(id)

#define	UDMA_I2C_ID(id)

#define	UDMA_HYPER_ID(id)

#define	UDMA_JTAG_FIFO_ID(id)

#define	UDMA_I2S_ID(id)

#define	UDMA_CPI_ID(id)

#define	UDMA_CSI2_ID(id)

#define	UDMA_MRAM_ID(id)

#define	UDMA_FILTER_ID(id)

#define	UDMA_TIMESTAMP_ID(id)

#define	UDMA_AES_ID(id)

#define	UDMA_SFU_ID(id)

#define	UDMA_FFC_ID(id)

#define	UDMA_ASRC_ID(id)

#define	ARCHI_NB_PAD

#define	ARCHI_NB_GPIO

#define	GPIO_ID(id)

#define	ARCHI_NB_PWM

#define	ARCHI_NB_CHANNEL_PER_PWM

#define	ARCHI_HAS_CLUSTER

#define	ARCHI_CL_CID(id)

#define	ARCHI_CLUSTER_NB_PE

#define	ARCHI_CLUSTER_PE_MASK

#define	ARCHI_CLUSTER_MASTER_CORE

#define	ARCHI_CLUSTER_SYNC_BARR_ID

#define	ARCHI_HAS_CLUSTER_CLK_GATE

#define	ARCHI_CLUSTER_SIZE

#define	ARCHI_HAS_CL_L1_ALIAS

#define	CL_L1_SIZE

#define	ARCHI_HAS_CL_L1_TS

#define	ARCHI_CL_L1_TS_OFFSET

#define	CL_CTRL_OFFSET

#define	CL_TIMER_OFFSET

#define	CL_GLOB_EU_CORE_OFFSET

#define	CL_GLOB_EU_BARRIER_OFFSET

#define	CL_GLOB_EU_SW_EVENT_OFFSET

#define	CL_GLOB_EU_SOC_EVENT_OFFSET

#define	CL_GLOB_EU_DISPATCH_OFFSET

#define	CL_HWCE_OFFSET

#define	CL_ICACHE_CTRL_OFFSET

#define	CL_DMA_OFFSET

#define	CL_DECOMP_OFFSET

#define	CL_DEMUX_PERIPH_OFFSET

#define	CL_DEMUX_EU_CORE_OFFSET

#define	CL_DEMUX_EU_LOOP_OFFSET

#define	CL_DEMUX_EU_DISPATCH_OFFSET

#define	CL_DEMUX_EU_MUTEX_OFFSET

#define	CL_DEMUX_EU_SW_EVENT_OFFSET

#define	CL_DEMUX_EU_BARRIER_OFFSET

#define	CL_DEMUX_DMA_OFFSET

#define	CL_DMA_ID(id)

Macro Definition Documentation

#define ADV_TIMER_OFFSET

#define APB_SOC_CTRL_OFFSET

#define ARCHI_CL_CID ( id )

#define ARCHI_CL_L1_TS_OFFSET

#define ARCHI_CLUSTER_MASTER_CORE

#define ARCHI_CLUSTER_NB_PE

#define ARCHI_CLUSTER_PE_MASK

#define ARCHI_CLUSTER_SIZE

#define ARCHI_CLUSTER_SYNC_BARR_ID

#define ARCHI_FC_CID

#define ARCHI_FLL_REF_CLOCK

#define ARCHI_FREQ_INIT

#define ARCHI_HAS_CL_L1_ALIAS

#define ARCHI_HAS_CL_L1_TS

#define ARCHI_HAS_CLUSTER

#define ARCHI_HAS_CLUSTER_CLK_GATE

#define ARCHI_HAS_FC_ITC

#define ARCHI_HAS_L2_ALIAS

#define ARCHI_HAS_L2_PRIV0_TS

#define ARCHI_HAS_L2_PRIV1_TS

#define ARCHI_L2_TS_OFFSET

#define ARCHI_NB_CHANNEL_PER_PWM

#define ARCHI_NB_FLL

#define ARCHI_NB_GPIO

#define ARCHI_NB_PAD

#define ARCHI_NB_PWM

#define ARCHI_NB_TIMER_FC

#define ARCHI_REF_CLOCK

#define CL_CTRL_OFFSET

#define CL_DECOMP_OFFSET

#define CL_DEMUX_DMA_OFFSET

#define CL_DEMUX_EU_BARRIER_OFFSET

#define CL_DEMUX_EU_CORE_OFFSET

#define CL_DEMUX_EU_DISPATCH_OFFSET

#define CL_DEMUX_EU_LOOP_OFFSET

#define CL_DEMUX_EU_MUTEX_OFFSET

#define CL_DEMUX_EU_SW_EVENT_OFFSET

#define CL_DEMUX_PERIPH_OFFSET

#define CL_DMA_ID ( id )

#define CL_DMA_OFFSET

#define CL_GLOB_EU_BARRIER_OFFSET

#define CL_GLOB_EU_CORE_OFFSET

#define CL_GLOB_EU_DISPATCH_OFFSET

#define CL_GLOB_EU_SOC_EVENT_OFFSET

#define CL_GLOB_EU_SW_EVENT_OFFSET

#define CL_HWCE_OFFSET

#define CL_ICACHE_CTRL_OFFSET

#define CL_L1_SIZE

#define CL_TIMER_OFFSET

#define CSI2_OFFSET

#define DEBUG_OFFSET

#define DPHY_OFFSET

#define EFUSE_OFFSET

#define FC_ICACHE_OFFSET

#define FC_ITC_OFFSET

#define FC_TIMER ( id )

#define FC_TIMER_OFFSET

#define FLL_ID_CL

#define FLL_ID_FC

#define FLL_ID_PERIPH

#define FLL_OFFSET

#define GPIO_ID ( id )

#define GPIO_OFFSET

#define I3C0_OFFSET

#define L2_PRIV0_SIZE

#define L2_PRIV1_SIZE

#define L2_SHARED_SIZE

#define MPU_OFFSET

#define PMU_OFFSET

#define QUIDDIKEY_OFFSET

#define ROM_SIZE

#define RTC_BASE_OFFSET

#define SOC_EU_OFFSET

#define STDOUT_OFFSET

#define TIMER_SIZE

#define TIMER_SIZE_LOG2

#define UDMA_AES_ID ( id )

Referenced by __pi_aes_close(), and __pi_aes_open().

#define UDMA_ASRC_ID ( id )

Referenced by __pi_asrc_close(), and __pi_asrc_open().

#define UDMA_CHAN_2D_ID ( id )

Referenced by __pi_hyper_close(), __pi_octospi_close(), pi_udma_core_2d_alloc(), and pi_udma_core_2d_free().

#define UDMA_CHAN_2D_OFFSET

#define UDMA_CHAN_2D_SIZE

#define UDMA_CHAN_2D_SIZE_LOG2

#define UDMA_CHAN_FIFO_ID ( id )

Referenced by __pi_aes_crypt_start(), pi_udma_core_fifo_alloc(), and pi_udma_core_fifo_free().

#define UDMA_CHAN_FIFO_OFFSET

#define UDMA_CHAN_FIFO_SIZE

#define UDMA_CHAN_FIFO_SIZE_LOG2

#define UDMA_CHAN_LIN_ID ( id )

Referenced by __pi_uart_conf_set(), __pi_uart_rx_abort(), __pi_uart_rx_timeout_abort(), __pi_uart_tx_abort(), __pi_uart_tx_timeout_abort(), pi_udma_core_lin_alloc(), and pi_udma_core_lin_free().

#define UDMA_CHAN_LIN_OFFSET

#define UDMA_CHAN_LIN_SIZE

#define UDMA_CHAN_LIN_SIZE_LOG2

#define UDMA_CPI_ID ( id )

#define UDMA_CSI2_ID ( id )

#define UDMA_FFC_ID ( id )

Referenced by pi_ffc_close(), and pi_ffc_open().

#define UDMA_FILTER_ID ( id )

#define UDMA_HAS_AES

#define UDMA_HAS_ASRC

#define UDMA_HAS_CPI

#define UDMA_HAS_CSI2

#define UDMA_HAS_FFC

#define UDMA_HAS_FILTER

#define UDMA_HAS_HYPER

#define UDMA_HAS_I2C

#define UDMA_HAS_I2S

#define UDMA_HAS_JTAG_FIFO

#define UDMA_HAS_MRAM

#define UDMA_HAS_SPIM

#define UDMA_HAS_TIMESTAMP

#define UDMA_HAS_UART

#define UDMA_HYPER_ID ( id )

#define UDMA_I2C_ID ( id )

#define UDMA_I2S_ID ( id )

#define UDMA_JTAG_FIFO_ID ( id )

#define UDMA_MRAM_ID ( id )

#define UDMA_NB_AES

#define UDMA_NB_ASRC

#define UDMA_NB_CHAN_2D

Referenced by hal_udma_core_fifo_get(), pi_udma_core_2d_alloc(), and pi_udma_core_2d_free().

#define UDMA_NB_CHAN_FIFO

Referenced by __pi_aes_crypt_start(), pi_udma_core_fifo_alloc(), and pi_udma_core_fifo_free().

#define UDMA_NB_CHAN_LIN

Referenced by __pi_udma_datamove_copy_start(), hal_udma_core_fifo_get(), pi_udma_core_lin_alloc(), pi_udma_core_lin_free(), pi_udma_datamove_close(), and pi_udma_datamove_open().

#define UDMA_NB_CPI

#define UDMA_NB_CSI2

#define UDMA_NB_FFC

#define UDMA_NB_FILTER

#define UDMA_NB_HYPER

#define UDMA_NB_I2C

#define UDMA_NB_I2S

#define UDMA_NB_JTAG_FIFO

#define UDMA_NB_MRAM

#define UDMA_NB_PERIPH

#define UDMA_NB_SFU

#define UDMA_NB_SPIM

#define UDMA_NB_TIMEOUT

Referenced by pi_udma_timeout_alloc().

#define UDMA_NB_TIMESTAMP

#define UDMA_NB_UART

#define UDMA_OFFSET

#define UDMA_PERIPH_SIZE

#define UDMA_PERIPH_SIZE_LOG2

#define UDMA_SFU_ID ( id )

#define UDMA_SPIM_ID ( id )

#define UDMA_TIMESTAMP_ID ( id )

Referenced by pi_udma_timestamp_close(), and pi_udma_timestamp_open().

#define UDMA_UART_ID ( id )

Macros

Macro Definition Documentation