FreeRTOS port on GAP8/RISC-V
|
Macros | |
#define | EFUSE_CFG_CNT_TARGET1_BIT |
#define | EFUSE_CFG_CNT_TARGET1_WIDTH |
#define | EFUSE_CFG_CNT_TARGET1_MASK |
#define | EFUSE_CFG_CNT_TARGET1_RESET |
#define | EFUSE_CFG_CNT_TARGET2_BIT |
#define | EFUSE_CFG_CNT_TARGET2_WIDTH |
#define | EFUSE_CFG_CNT_TARGET2_MASK |
#define | EFUSE_CFG_CNT_TARGET2_RESET |
#define | EFUSE_CFG_CNT_TARGET3_BIT |
#define | EFUSE_CFG_CNT_TARGET3_WIDTH |
#define | EFUSE_CFG_CNT_TARGET3_MASK |
#define | EFUSE_CFG_CNT_TARGET3_RESET |
#define | EFUSE_CFG_MARGIN_BIT |
#define | EFUSE_CFG_MARGIN_WIDTH |
#define | EFUSE_CFG_MARGIN_MASK |
#define | EFUSE_CFG_MARGIN_RESET |
#define EFUSE_CFG_CNT_TARGET1_BIT |
#define EFUSE_CFG_CNT_TARGET1_MASK |
#define EFUSE_CFG_CNT_TARGET1_RESET |
#define EFUSE_CFG_CNT_TARGET1_WIDTH |
#define EFUSE_CFG_CNT_TARGET2_BIT |
#define EFUSE_CFG_CNT_TARGET2_MASK |
#define EFUSE_CFG_CNT_TARGET2_RESET |
#define EFUSE_CFG_CNT_TARGET2_WIDTH |
#define EFUSE_CFG_CNT_TARGET3_BIT |
#define EFUSE_CFG_CNT_TARGET3_MASK |
#define EFUSE_CFG_CNT_TARGET3_RESET |
#define EFUSE_CFG_CNT_TARGET3_WIDTH |
#define EFUSE_CFG_MARGIN_BIT |
#define EFUSE_CFG_MARGIN_MASK |
#define EFUSE_CFG_MARGIN_RESET |
#define EFUSE_CFG_MARGIN_WIDTH |