ASIC Verification Engineer
Job Number: J1905
We are looking for an ASIC Verification Engineer who will join the HW design team to work on the next generation of GAP8’s verification process.
- Verification of the design, architecture
andmicro-architecture of GAP8 SoC using advanced verification methodologies from specification, RTL simulation, gate level simulation, formal verification, assertion basedverification to FPGA emulation
- Verification area covers functional items but also low power and performance
- Developing unit verification environments in system
verilog(inc. UVM) for the constituent components of the chip
- Developing verification environment of the full GAP8 next generations chip
- Contributing to verification plan definition and enhancement
- Writing functional test cases to stimulate and verify all the features of the chip and its components
- Improving automation of the verification flow using EDA tools from Mentor (Questasim) and Cadence (Xcelium, Conformal)
- Putting in place a quantitative metric measurement approach to generate verification achievement reports
- Master Degree or plus in Electrical Engineering or Computer Engineering
- More than 2 to 5 years experience in ASIC design or verification
- Knowledge of V
erilogand/or System Verilog. UVM is a plus. SV object-oriented and TB structuring knowledge would be nice.
- Knowledge in software programming: C language is a must. Bash, TCL, Python would be appreciated.
- Passionate for debugging and strong problem solving
- Ability to work autonomously and proactively on tasks
- Work comfortably in an international environment, exchanging by email, message, telephone or conf-calls: Fluency in English is necessary.
- Strong team spirit and communication, happy to collaborate and share with colleagues, even remotely.
- Experiences in ASIC synthesis, Static timing analysis, equivalence checking, low power architecture, multi-clock domain architecture
- Signal processing (Image, voice, audio, vibration) experience
Job Category: Engineering
Job Type: Full time (CDI)
Job Location: Grenoble. France (Alsace-Lorraine near train/tram)