The fundamentals of GAP, the IoT application processors
|22.65 GOPS||150.8 GOPS|
|4.24 mW/GOP||0.33 mW/GOP|
|L1||80 kB||128 kB|
|RAM||512 kB||1.5 MB|
|Non Volatile||None||2 MB|
|External||QSPI/ HyperBus||2x QSPI/OCTO-SPI/HyperBus/SDIO|
|8, 16, 32-bit||8, 16, 32, 64-bit***|
|2 Rx-Only I2S interfaces||3 master/slave SAI full duplex, I2S and TDM 4/8/16 ch capable|
|8-bit CPI (Camera Parallel Interface)||8-bit CPI, 2-lane CSI-2|
|aQFN 88 7x7mm||BGA 5.5×5.5mm – WL-CSP 3.4x 3.4mm|
|In production||Samples in 2020. In production 2021|
*FC (Fabric Controller) is the main system controller and resembles a standard MCU; it can delegate compute-intensive tasks to the Cluster.
**GAP includes a multicore compute cluster with a shared memory architecture and hardware thread synchronization. The cluster enables highly efficient, parallel implementation of algorithms giving almost optimal linear speedup.
*** 64 bit support included in selected instructions.